With more information at hand with the reference manual from Freescale
http://cache.nxp.com/files/32bit/doc/ref_manual/SPEPEM.pdf , I was able to
revisit my patch and figure out what is actually going on.
Before applying any patch, efscmp* instructions in QEMU set crD values as
(0b0100 << 2) = 0b1
Adding some more basis to the patch:
I received some documentation from Freescale support relating to this:
Signal Processing Engine (SPE) Programming Environments Manual:
http://cache.nxp.com/files/32bit/doc/ref_manual/SPEPEM.pdf.
Relevant info is on page #113.
According to the documentation, t
