On Wed, Jul 14, 2021 at 11:41 AM Alistair Francis wrote:
>
> On Tue, Jul 13, 2021 at 2:06 PM Anup Patel wrote:
> >
> > On Fri, Jul 9, 2021 at 9:01 AM Alistair Francis
> > wrote:
> > >
> > > Instead of using riscv_cpu_update_mip() let's instead use the new RISC-V
> > > CPU GPIO lines to set the t
On Tue, Jul 13, 2021 at 2:06 PM Anup Patel wrote:
>
> On Fri, Jul 9, 2021 at 9:01 AM Alistair Francis
> wrote:
> >
> > Instead of using riscv_cpu_update_mip() let's instead use the new RISC-V
> > CPU GPIO lines to set the timer and soft MIP bits.
> >
> > Signed-off-by: Alistair Francis
> > ---
>
On Fri, Jul 9, 2021 at 9:01 AM Alistair Francis
wrote:
>
> Instead of using riscv_cpu_update_mip() let's instead use the new RISC-V
> CPU GPIO lines to set the timer and soft MIP bits.
>
> Signed-off-by: Alistair Francis
> ---
> include/hw/intc/sifive_clint.h | 2 +
> hw/intc/sifive_clint.c
On Sat, Jul 10, 2021 at 1:36 AM Richard Henderson
wrote:
>
> On 7/8/21 8:30 PM, Alistair Francis wrote:
> > +typedef struct sifive_clint_callback {
> > +SiFiveCLINTState *s;
> > +int num;
> > +} sifive_clint_callback;
>
> Perhaps better to put "num", perhaps with a more descriptive name (h
On 7/8/21 8:30 PM, Alistair Francis wrote:
+typedef struct sifive_clint_callback {
+SiFiveCLINTState *s;
+int num;
+} sifive_clint_callback;
Perhaps better to put "num", perhaps with a more descriptive name (hartid?), into
SiFiveCLINTState itself?
It would avoid some amount of double
