On 30/1/25 19:36, Peter Maydell wrote:
On Thu, 30 Jan 2025 at 18:25, Philippe Mathieu-Daudé wrote:
When not specified, Cortex-A9MP configures its GIC with 64 external
IRQs (see commit a32134aad89 "arm:make the number of GIC interrupts
configurable"). Add the GIC_EXT_IRQS definition (with a com
On Thu, 30 Jan 2025 at 18:25, Philippe Mathieu-Daudé wrote:
>
> When not specified, Cortex-A9MP configures its GIC with 64 external
> IRQs (see commit a32134aad89 "arm:make the number of GIC interrupts
> configurable"). Add the GIC_EXT_IRQS definition (with a comment)
> to make that explicit.
>
>
