在 2022/7/8 上午1:20, Mayuresh Chitale 写道:
On Sat, 2022-07-02 at 18:33 +0800, angell1518 wrote:
At 2022-06-04 00:04:23, "Mayuresh Chitale"
wrote:
Accesses to henvcfg, henvcfgh and senvcfg are allowed
only if corresponding bit in mstateen0/hstateen0 is
enabled. Otherwise an illegal instruction tra
On Sat, 2022-07-02 at 18:33 +0800, angell1518 wrote:
> At 2022-06-04 00:04:23, "Mayuresh Chitale" > wrote:
> >Accesses to henvcfg, henvcfgh and senvcfg are allowed
> >only if corresponding bit in mstateen0/hstateen0 is
> >enabled. Otherwise an illegal instruction trap is
> >generated.
> >
> >Signe
At 2022-06-04 00:04:23, "Mayuresh Chitale" wrote:
>Accesses to henvcfg, henvcfgh and senvcfg are allowed
>only if corresponding bit in mstateen0/hstateen0 is
>enabled. Otherwise an illegal instruction trap is
>generated.
>
>Signed-off-by: Mayuresh Chitale
>---
> target/riscv/csr.c | 84 +
On Sat, Jun 4, 2022 at 2:16 AM Mayuresh Chitale
wrote:
>
> Accesses to henvcfg, henvcfgh and senvcfg are allowed
> only if corresponding bit in mstateen0/hstateen0 is
> enabled. Otherwise an illegal instruction trap is
> generated.
>
> Signed-off-by: Mayuresh Chitale
Reviewed-by: Alistair Franci
On Thu, Jun 16, 2022 at 4:54 PM Alistair Francis wrote:
>
> On Sat, Jun 4, 2022 at 2:16 AM Mayuresh Chitale
> wrote:
> >
> > Accesses to henvcfg, henvcfgh and senvcfg are allowed
> > only if corresponding bit in mstateen0/hstateen0 is
> > enabled. Otherwise an illegal instruction trap is
> > gene
On Sat, Jun 4, 2022 at 2:16 AM Mayuresh Chitale
wrote:
>
> Accesses to henvcfg, henvcfgh and senvcfg are allowed
> only if corresponding bit in mstateen0/hstateen0 is
> enabled. Otherwise an illegal instruction trap is
> generated.
>
> Signed-off-by: Mayuresh Chitale
> ---
> target/riscv/csr.c |
