On 31/5/24 09:46, Cédric Le Goater wrote:
Hello Jamin,
I refer to versal_create_apu_gic function,
https://github.com/qemu/qemu/blob/master/hw/arm/xlnx-versal.c#L67
and updated aspeed_soc_ast2700_gic as following.
If you have any concerned about the new changes, please let me know.
Thanks-Jamin
Hi Cedric,
> From: Cédric Le Goater
> On 5/27/24 10:02, Jamin Lin wrote:
> > Initial definitions for a simple machine using an AST2700 SOC (Cortex-a35
> CPU).
> >
> > AST2700 SOC and its interrupt controller are too complex to handle in
> > the common Aspeed SoC framework. We introduce a new ast2
Hi Cedric,
> From: Cédric Le Goater
> Subject: Re: [PATCH v4 12/16] aspeed/soc: Add AST2700 support
>
>
> Hello Jamin,
> > I refer to versal_create_apu_gic function,
> https://github.com/qemu/qemu/blob/master/hw/arm/xlnx-versal.c#L67
> > and updated aspeed_soc_as
Hello Jamin,
I refer to versal_create_apu_gic function,
https://github.com/qemu/qemu/blob/master/hw/arm/xlnx-versal.c#L67
and updated aspeed_soc_ast2700_gic as following.
If you have any concerned about the new changes, please let me know.
Thanks-Jamin
static bool aspeed_soc_ast2700_gic(Devic
Hi Cedric,
> From: Cédric Le Goater
> Subject: Re: [PATCH v4 12/16] aspeed/soc: Add AST2700 support
>
> On 5/27/24 10:02, Jamin Lin wrote:
> > Initial definitions for a simple machine using an AST2700 SOC (Cortex-a35
> CPU).
> >
> > AST2700 SOC and its interr
On 5/27/24 10:02, Jamin Lin wrote:
Initial definitions for a simple machine using an AST2700 SOC (Cortex-a35 CPU).
AST2700 SOC and its interrupt controller are too complex to handle
in the common Aspeed SoC framework. We introduce a new ast2700
class with instance_init and realize handlers.
AST
On 5/27/24 10:02, Jamin Lin wrote:
Initial definitions for a simple machine using an AST2700 SOC (Cortex-a35 CPU).
AST2700 SOC and its interrupt controller are too complex to handle
in the common Aspeed SoC framework. We introduce a new ast2700
class with instance_init and realize handlers.
AST
