gt; Sent: 27 May 2020 06:08
> > > To: Anup Patel
> > > Cc: Palmer Dabbelt ; Peter Maydell
> > > ; qemu-ri...@nongnu.org;
> > > sag...@eecs.berkeley.edu; a...@brainfault.org;
> > > qemu-devel@nongnu.org; Atish Patra ; Alistair
> > > Francis
>
.@nongnu.org;
> > sag...@eecs.berkeley.edu; a...@brainfault.org; qemu-devel@nongnu.org;
> > Atish Patra ; Alistair Francis
> >
> > Subject: Re: [PATCH 2/4] hw/riscv: spike: Allow creating multiple sockets
> >
> > On Fri, May 22, 2020 at 3:10 AM Anup Patel wrote:
> > >
1:46
> > > To: Anup Patel
> > > Cc: Peter Maydell ; Alistair Francis
> > > ; sag...@eecs.berkeley.edu; Atish Patra
> > > ; a...@brainfault.org; qemu-ri...@nongnu.org;
> > > qemu-devel@nongnu.org; Anup Patel
> > > Subject: Re: [PATCH 2/4] hw/riscv: spike:
; > ; a...@brainfault.org; qemu-ri...@nongnu.org;
> > qemu-devel@nongnu.org; Anup Patel
> > Subject: Re: [PATCH 2/4] hw/riscv: spike: Allow creating multiple sockets
> >
> > On Fri, 15 May 2020 23:37:44 PDT (-0700), Anup Patel wrote:
> > > We extend RISC-V spi
Subject: Re: [PATCH 2/4] hw/riscv: spike: Allow creating multiple sockets
>
> On Fri, 15 May 2020 23:37:44 PDT (-0700), Anup Patel wrote:
> > We extend RISC-V spike machine to allow creating a multi-socket machine.
> > Each RISC-V spike machine socket is a set of HARTs and a CLI
On Fri, 15 May 2020 23:37:44 PDT (-0700), Anup Patel wrote:
We extend RISC-V spike machine to allow creating a multi-socket machine.
Each RISC-V spike machine socket is a set of HARTs and a CLINT instance.
Other peripherals are shared between all RISC-V spike machine sockets.
We also update RISC-
