Re: [RFC PATCH v5 04/22] target/arm: Implement ALLINT MSR (immediate)

2024-02-29 Thread Richard Henderson
On 2/29/24 03:10, Jinjie Ruan via wrote: +static bool trans_MSR_i_ALLINT(DisasContext *s, arg_i *a) +{ +if (!dc_isar_feature(aa64_nmi, s) || s->current_el == 0) { +return false; +} + +if (a->imm == 0) { +clear_pstate_bits(PSTATE_ALLINT); +} else if (s->current_el >

[RFC PATCH v5 04/22] target/arm: Implement ALLINT MSR (immediate)

2024-02-29 Thread Jinjie Ruan via
Add ALLINT MSR (immediate) to decodetree, in which the CRm is 0b000x. The EL0 check is necessary to ALLINT, and the EL1 check is necessary when imm == 1. So implement it inline for EL2/3, or EL1 with imm==0. Avoid the unconditional write to pc and use raise_exception_ra to unwind. Signed-off-by: J