On 2/23/24 00:32, Jinjie Ruan via wrote:
Add IS and FS bit in ISR_EL1 and handle the read. With CPU_INTERRUPT_NMI, both
CPSR_I and ISR_IS must be set.
Signed-off-by: Jinjie Ruan
--
v3:
- CPU_INTERRUPT_NMI do not set FIQ, so remove it.
- With CPU_INTERRUPT_NMI, both CPSR_I and ISR_IS must be set
Add IS and FS bit in ISR_EL1 and handle the read. With CPU_INTERRUPT_NMI, both
CPSR_I and ISR_IS must be set.
Signed-off-by: Jinjie Ruan
--
v3:
- CPU_INTERRUPT_NMI do not set FIQ, so remove it.
- With CPU_INTERRUPT_NMI, both CPSR_I and ISR_IS must be set.
---
target/arm/cpu.h| 2 ++
target/a
