On Thu, Feb 29, 2024 at 1:57 AM Peter Maydell wrote:
>
> On Thu, 29 Feb 2024 at 04:52, Joe Komlodi wrote:
> > On Wed, Feb 28, 2024 at 6:21 AM Peter Maydell
> > wrote:
> > > So as far as I can see, this patchset defines a bunch of mechanism,
> > > but no actual users: no device looks at these ne
On Thu, 29 Feb 2024 at 04:52, Joe Komlodi wrote:
> On Wed, Feb 28, 2024 at 6:21 AM Peter Maydell
> wrote:
> > So as far as I can see, this patchset defines a bunch of mechanism,
> > but no actual users: no device looks at these new memattrs, no board
> > code sets the properties. I don't really
On Wed, Feb 28, 2024 at 6:21 AM Peter Maydell wrote:
>
> On Tue, 27 Feb 2024 at 22:24, Joe Komlodi wrote:
> > This adds requester IDs to ARM CPUs and adds a "user-defined" memory
> > attribute.
> >
> > The requester ID on ARM CPUs is there because I've seen some cases where
> > there's an IOMMU b
On Tue, 27 Feb 2024 at 22:24, Joe Komlodi wrote:
> This adds requester IDs to ARM CPUs and adds a "user-defined" memory
> attribute.
>
> The requester ID on ARM CPUs is there because I've seen some cases where
> there's an IOMMU between a CPU and memory that uses the CPU's requester
> ID to look u
Hi all,
This adds requester IDs to ARM CPUs and adds a "user-defined" memory
attribute.
The requester ID on ARM CPUs is there because I've seen some cases where
there's an IOMMU between a CPU and memory that uses the CPU's requester
ID to look up how it should translate, such as an SMMU TBU or so
