On 5/17/10, Paolo Bonzini wrote:
> > > > In 2/2, A20 logic changes a bit but I doubt any guest would be broken
> > > > if A20 line written through I/O port 92 couldn't be read via i8042.
> > > > The reverse (write using i8042 and read port 92) will work.
> > > >
> > >
> > > Why take the risk
> > > In 2/2, A20 logic changes a bit but I doubt any guest would be broken
> > > if A20 line written through I/O port 92 couldn't be read via i8042.
> > > The reverse (write using i8042 and read port 92) will work.
> > >
> >
> > Why take the risk?
>
> The alternative is to route a signal from po
On 5/16/10, Jamie Lokier wrote:
> Blue Swirl wrote:
> > On 5/16/10, Paolo Bonzini wrote:
> > > On 05/15/2010 11:49 AM, Blue Swirl wrote:
> > >
> > > > In 2/2, A20 logic changes a bit but I doubt any guest would be broken
> > > > if A20 line written through I/O port 92 couldn't be read via i8
Blue Swirl wrote:
> On 5/16/10, Paolo Bonzini wrote:
> > On 05/15/2010 11:49 AM, Blue Swirl wrote:
> >
> > > In 2/2, A20 logic changes a bit but I doubt any guest would be broken
> > > if A20 line written through I/O port 92 couldn't be read via i8042.
> > > The reverse (write using i8042 and read
On 5/16/10, Paolo Bonzini wrote:
> On 05/15/2010 11:49 AM, Blue Swirl wrote:
>
> > In 2/2, A20 logic changes a bit but I doubt any guest would be broken
> > if A20 line written through I/O port 92 couldn't be read via i8042.
> > The reverse (write using i8042 and read port 92) will work.
> >
>
>
On 05/15/2010 11:49 AM, Blue Swirl wrote:
In 2/2, A20 logic changes a bit but I doubt any guest would be broken
if A20 line written through I/O port 92 couldn't be read via i8042.
The reverse (write using i8042 and read port 92) will work.
Why take the risk?
PaolO
