[Qemu-devel] Re: [PATCH] sparc32 esp fix spurious interrupts in chip reset

2010-06-10 Thread Artyom Tarasenko
2010/6/9 Blue Swirl : > On Fri, Jun 4, 2010 at 8:30 PM, Artyom Tarasenko > wrote: >> 2010/6/4 Blue Swirl : >>> On Tue, Jun 1, 2010 at 8:16 PM, Artyom Tarasenko >>> wrote: 2010/6/1 Blue Swirl : > On Tue, Jun 1, 2010 at 7:56 PM, Artyom Tarasenko > wrote: >> 2010/6/1 Blue Swirl : >

[Qemu-devel] Re: [PATCH] sparc32 esp fix spurious interrupts in chip reset

2010-06-09 Thread Blue Swirl
On Fri, Jun 4, 2010 at 8:30 PM, Artyom Tarasenko wrote: > 2010/6/4 Blue Swirl : >> On Tue, Jun 1, 2010 at 8:16 PM, Artyom Tarasenko >> wrote: >>> 2010/6/1 Blue Swirl : On Tue, Jun 1, 2010 at 7:56 PM, Artyom Tarasenko wrote: > 2010/6/1 Blue Swirl : >> On Sun, May 30, 2010 at 10:

[Qemu-devel] Re: [PATCH] sparc32 esp fix spurious interrupts in chip reset

2010-06-08 Thread Artyom Tarasenko
2010/6/4 Blue Swirl : > On Tue, Jun 1, 2010 at 8:16 PM, Artyom Tarasenko > wrote: >> 2010/6/1 Blue Swirl : >>> On Tue, Jun 1, 2010 at 7:56 PM, Artyom Tarasenko >>> wrote: 2010/6/1 Blue Swirl : > On Sun, May 30, 2010 at 10:35 PM, Artyom Tarasenko > wrote: >> lower interrupt durin

[Qemu-devel] Re: [PATCH] sparc32 esp fix spurious interrupts in chip reset

2010-06-04 Thread Blue Swirl
On Tue, Jun 1, 2010 at 8:16 PM, Artyom Tarasenko wrote: > 2010/6/1 Blue Swirl : >> On Tue, Jun 1, 2010 at 7:56 PM, Artyom Tarasenko >> wrote: >>> 2010/6/1 Blue Swirl : On Sun, May 30, 2010 at 10:35 PM, Artyom Tarasenko wrote: > lower interrupt during chip reset. Otherwise the ESP_R

[Qemu-devel] Re: [PATCH] sparc32 esp fix spurious interrupts in chip reset

2010-06-01 Thread Artyom Tarasenko
2010/6/1 Blue Swirl : > On Tue, Jun 1, 2010 at 7:56 PM, Artyom Tarasenko > wrote: >> 2010/6/1 Blue Swirl : >>> On Sun, May 30, 2010 at 10:35 PM, Artyom Tarasenko >>> wrote: lower interrupt during chip reset. Otherwise the ESP_RSTAT register may get out of sync with the IRQ line status.

[Qemu-devel] Re: [PATCH] sparc32 esp fix spurious interrupts in chip reset

2010-06-01 Thread Blue Swirl
On Tue, Jun 1, 2010 at 7:56 PM, Artyom Tarasenko wrote: > 2010/6/1 Blue Swirl : >> On Sun, May 30, 2010 at 10:35 PM, Artyom Tarasenko >> wrote: >>> lower interrupt during chip reset. Otherwise the ESP_RSTAT register >>> may get out of sync with the IRQ line status. This effect became >>> visible

[Qemu-devel] Re: [PATCH] sparc32 esp fix spurious interrupts in chip reset

2010-06-01 Thread Artyom Tarasenko
2010/6/1 Blue Swirl : > On Sun, May 30, 2010 at 10:35 PM, Artyom Tarasenko > wrote: >> lower interrupt during chip reset. Otherwise the ESP_RSTAT register >> may get out of sync with the IRQ line status. This effect became >> visible after commit 65899fe3 > > Hard reset handlers should not touch q

[Qemu-devel] Re: [PATCH] sparc32 esp fix spurious interrupts in chip reset

2010-06-01 Thread Blue Swirl
On Sun, May 30, 2010 at 10:35 PM, Artyom Tarasenko wrote: > lower interrupt during chip reset. Otherwise the ESP_RSTAT register > may get out of sync with the IRQ line status. This effect became > visible after commit 65899fe3 Hard reset handlers should not touch qemu_irqs, because on cold start,