Am 24.01.2014 09:31, schrieb Antony Pavlov:
> On Thu, 23 Jan 2014 22:25:36 +
> Peter Maydell wrote:
>
>> Since the 946 doesn't provide any way to find out what the fault
>> address actually was (it has no DFAR or IFAR) I presume that all
>> guest software treats a data abort or prefetch abort
On Thu, 23 Jan 2014 22:25:36 +
Peter Maydell wrote:
> Hi Antony; have you noticed any issues with QEMU's handling of
> MPU faults (data or address faults) on our ARM946 model?
> I ask because DIGIC is the only board we have that uses the 946,
> and as far as I can tell from the QEMU source co
On 23 January 2014 23:36, Andreas Färber wrote:
> Am 23.01.2014 23:25, schrieb Peter Maydell:
>> This bug would also affect the ARMv7M CPU (Cortex-M3) we emulate,
>> except that as far as I can tell we don't implement its MPU interface at all!
>> (it uses memory mapped registers rather than cp15 r
Am 23.01.2014 23:25, schrieb Peter Maydell:
> This bug would also affect the ARMv7M CPU (Cortex-M3) we emulate,
> except that as far as I can tell we don't implement its MPU interface at all!
> (it uses memory mapped registers rather than cp15 regs, and they just
> aren't wired up in armv7m_nvic.c.
Hi Antony; have you noticed any issues with QEMU's handling of
MPU faults (data or address faults) on our ARM946 model?
I ask because DIGIC is the only board we have that uses the 946,
and as far as I can tell from the QEMU source code we will
incorrectly trash the access permissions registers any
