Vince Weaver writes:
[...]
> diff --git a/target-i386/helper.c b/target-i386/helper.c
> index 26ea1e5..f2aa2d7 100644
> --- a/target-i386/helper.c
> +++ b/target-i386/helper.c
> @@ -31,6 +31,20 @@
> //#define DEBUG_MMU
> +long long global_ins_count[3] = {0,0,0};
> +
> +void helper_insn_count(u
On Sat, 6 Nov 2010, Stefan Hajnoczi wrote:
> On Thu, Nov 4, 2010 at 7:20 PM, Vince Weaver wrote:
> > This is mostly a proof of concept, I'm not sure if anyone is interested in
> > this. It could in theory be useful for tracking down performance problems
> > from iside of Qemu using existing to
On Thu, Nov 4, 2010 at 7:20 PM, Vince Weaver wrote:
> This is mostly a proof of concept, I'm not sure if anyone is interested in
> this. It could in theory be useful for tracking down performance problems
> from iside of Qemu using existing tools.
This patch handles uniprocessor guests only?
Th
Hello
The following patch enables simulated perf event support inside of Qemu
for x86_64 systems. It enables support for the AMD performance MSRs enough
to return values for the "retired_instructions" (both user and kernel) and
"cpu_clk_unhalted" events.
This is mostly a proof of concept, I'm
