On 12/08/2015 15:09, alvise rigo wrote:
> Yes, it could. However, it's really unlikely that a vCPU, after
> issuing a LL to the virtual address x, it stores to the same phys
> address using the virtual address y.
>
> I'm not really sure If we really need to handle these cases.
Ok, if we had to
Yes, it could. However, it's really unlikely that a vCPU, after
issuing a LL to the virtual address x, it stores to the same phys
address using the virtual address y.
I'm not really sure If we really need to handle these cases.
alvise
On Wed, Aug 12, 2015 at 2:43 PM, Paolo Bonzini wrote:
>
>
>
On 07/08/2015 19:03, Alvise Rigo wrote:
> +
> +/* For this vCPU, just update the TLB entry, no need to flush. */
> +env->tlb_table[mmu_idx][index].addr_write |= TLB_EXCL;
Couldn't this vCPU also have two aliasing entries in the TLB?
Paolo
On Tue, Aug 11, 2015 at 3:52 PM, Paolo Bonzini wrote:
>
>
> On 11/08/2015 15:32, alvise rigo wrote:
>>> > +#if DATA_SIZE > 1
>>> > +#define helper_ldlink_name glue(glue(helper_le_ldlink, USUFFIX),
>>> > MMUSUFFIX)
>>> > +#define helper_stcond_name glue(glue(helper_le_stcond, SUFFIX),
>>> > MMU
On 11/08/2015 15:32, alvise rigo wrote:
>> > +#if DATA_SIZE > 1
>> > +#define helper_ldlink_name glue(glue(helper_le_ldlink, USUFFIX),
>> > MMUSUFFIX)
>> > +#define helper_stcond_name glue(glue(helper_le_stcond, SUFFIX),
>> > MMUSUFFIX)
>> > +#define helper_ld_legacy glue(glue(helper_le_ld, U
On Fri, Aug 7, 2015 at 7:03 PM, Alvise Rigo
wrote:
> The new helpers rely on the legacy ones to perform the actual read/write.
>
> The LoadLink helper (helper_ldlink_name) prepares the way for the
> following SC operation. It sets the linked address and the size of the
> access.
> These helper als
The new helpers rely on the legacy ones to perform the actual read/write.
The LoadLink helper (helper_ldlink_name) prepares the way for the
following SC operation. It sets the linked address and the size of the
access.
These helper also update the TLB entry of the page involved in the
LL/SC for th
