Re: [Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support

2019-02-14 Thread Peter Xu
On Thu, Feb 14, 2019 at 08:22:05AM +, Tian, Kevin wrote: > > From: Peter Xu [mailto:pet...@redhat.com] > > Sent: Thursday, February 14, 2019 4:13 PM > > > > On Thu, Feb 14, 2019 at 07:35:20AM +, Tian, Kevin wrote: > > > > From: Peter Xu [mailto:pet...@redhat.com] > > > > Sent: Thursday, Fe

Re: [Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support

2019-02-14 Thread Tian, Kevin
> From: Peter Xu [mailto:pet...@redhat.com] > Sent: Thursday, February 14, 2019 4:13 PM > > On Thu, Feb 14, 2019 at 07:35:20AM +, Tian, Kevin wrote: > > > From: Peter Xu [mailto:pet...@redhat.com] > > > Sent: Thursday, February 14, 2019 3:14 PM > > > > > > > > > > > > When 256 bits invalidatio

Re: [Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support

2019-02-14 Thread Peter Xu
On Thu, Feb 14, 2019 at 07:35:20AM +, Tian, Kevin wrote: > > From: Peter Xu [mailto:pet...@redhat.com] > > Sent: Thursday, February 14, 2019 3:14 PM > > > > > > > > > When 256 bits invalidation descriptor is used, the guest driver > > > > should be responsible to fill in zeros into reserved fi

Re: [Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support

2019-02-13 Thread Tian, Kevin
> From: Peter Xu [mailto:pet...@redhat.com] > Sent: Thursday, February 14, 2019 3:14 PM > > > > > > When 256 bits invalidation descriptor is used, the guest driver > > > should be responsible to fill in zeros into reserved fields. > > > > > > Another question: is val[2] & val[3] used in any place

Re: [Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support

2019-02-13 Thread Peter Xu
On Thu, Feb 14, 2019 at 02:27:30PM +0800, Yi Sun wrote: > On 19-02-14 11:24:35, Peter Xu wrote: > > On Thu, Feb 14, 2019 at 09:52:04AM +0800, Yi Sun wrote: > > > > [...] > > > > > > > > > /* Fetch an Invalidation Descriptor from the Invalidation Queue > > > > > > > */ > > > > > > > -static bool

Re: [Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support

2019-02-13 Thread Yi Sun
On 19-02-14 11:24:35, Peter Xu wrote: > On Thu, Feb 14, 2019 at 09:52:04AM +0800, Yi Sun wrote: > > [...] > > > > > > > /* Fetch an Invalidation Descriptor from the Invalidation Queue */ > > > > > > -static bool vtd_get_inv_desc(dma_addr_t base_addr, uint32_t offset, > > > > > > +static bool vtd

Re: [Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support

2019-02-13 Thread Peter Xu
On Thu, Feb 14, 2019 at 09:52:04AM +0800, Yi Sun wrote: [...] > > > > > /* Fetch an Invalidation Descriptor from the Invalidation Queue */ > > > > > -static bool vtd_get_inv_desc(dma_addr_t base_addr, uint32_t offset, > > > > > +static bool vtd_get_inv_desc(IntelIOMMUState *s, > > > > >

Re: [Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support

2019-02-13 Thread Yi Sun
On 19-02-13 18:42:24, Peter Xu wrote: > On Wed, Feb 13, 2019 at 05:00:41PM +0800, Yi Sun wrote: > > [...] > > > > > > > > > /* context entry operations */ > > > > #define vtd_get_ce_size(s, ce) \ > > > > @@ -65,6 +66,9 @@ > > > > #define vtd_pe_get_slpt_base(pe) ((pe)->val[0] & > > > > VTD_

Re: [Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support

2019-02-13 Thread Peter Xu
On Wed, Feb 13, 2019 at 05:00:41PM +0800, Yi Sun wrote: [...] > > > > > > /* context entry operations */ > > > #define vtd_get_ce_size(s, ce) \ > > > @@ -65,6 +66,9 @@ > > > #define vtd_pe_get_slpt_base(pe) ((pe)->val[0] & > > > VTD_SM_PASID_ENTRY_SLPTPTR) > > > #define vtd_pe_get_domain_i

Re: [Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support

2019-02-13 Thread Yi Sun
On 19-02-12 14:27:28, Peter Xu wrote: > On Wed, Jan 30, 2019 at 01:09:12PM +0800, Yi Sun wrote: > > From: "Liu, Yi L" > > > > Per Intel(R) VT-d 3.0, the qi_desc is 256 bits in Scalable > > Mode. This patch adds emulation of 256bits qi_desc. > > > > [Yi Sun is co-developer to rebase and refine th

Re: [Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support

2019-02-11 Thread Peter Xu
On Wed, Jan 30, 2019 at 01:09:12PM +0800, Yi Sun wrote: > From: "Liu, Yi L" > > Per Intel(R) VT-d 3.0, the qi_desc is 256 bits in Scalable > Mode. This patch adds emulation of 256bits qi_desc. > > [Yi Sun is co-developer to rebase and refine the patch.] > Signed-off-by: Yi Sun > Signed-off-by:

[Qemu-devel] [RFC v1 2/3] intel_iommu: add 256 bits qi_desc support

2019-01-29 Thread Yi Sun
From: "Liu, Yi L" Per Intel(R) VT-d 3.0, the qi_desc is 256 bits in Scalable Mode. This patch adds emulation of 256bits qi_desc. [Yi Sun is co-developer to rebase and refine the patch.] Signed-off-by: Yi Sun Signed-off-by: Liu, Yi L --- hw/i386/intel_iommu.c | 182 +++