David Gibson writes:
> [ Unknown signature status ]
> On Mon, Jul 18, 2016 at 10:35:14PM +0530, Nikunj A Dadhania wrote:
>> From: Vivek Andrew Sha
>>
>> Returns:
>> -1 if bit 0 of CR field is set
>> 0 if bit 1 of CR field is set
>> 1 otherwise.
>
> Um.. that description is pretty inadeq
On Mon, Jul 18, 2016 at 10:35:14PM +0530, Nikunj A Dadhania wrote:
> From: Vivek Andrew Sha
>
> Returns:
> -1 if bit 0 of CR field is set
> 0 if bit 1 of CR field is set
> 1 otherwise.
Um.. that description is pretty inadequate. Retuns where? Which CR
field?
> Signed-off-by: Vivek Andr
On 07/18/2016 10:35 PM, Nikunj A Dadhania wrote:
+tcg_gen_andi_i32(t0, cpu_crf[crf], 0x3);
+tcg_gen_brcondi_i32(TCG_COND_EQ, t0, 0, l1);
+tcg_gen_andi_i32(t0, cpu_crf[crf], 0x1);
+tcg_gen_brcondi_i32(TCG_COND_EQ, t0, 1, l2);
+tcg_gen_movi_i64(cpu_gpr[rD(ctx->opcode)], 1);
+
From: Vivek Andrew Sha
Returns:
-1 if bit 0 of CR field is set
0 if bit 1 of CR field is set
1 otherwise.
Signed-off-by: Vivek Andrew Sha
[ reworded commit, used 32bit ops as crf is 32bits ]
Signed-off-by: Nikunj A Dadhania
---
target-ppc/translate.c | 30 +
