On 08/16/2016 04:45 PM, Vijay Kilari wrote:
On Tue, Aug 16, 2016 at 11:32 PM, Richard Henderson wrote:
On 08/16/2016 05:02 AM, vijay.kil...@gmail.com wrote:
+static inline void prefetch_vector_loop(const VECTYPE *p, int index)
+{
+#if defined(__aarch64__)
+if (is_thunderx_pass2_cpu()) {
+
On Tue, Aug 16, 2016 at 11:32 PM, Richard Henderson wrote:
> On 08/16/2016 05:02 AM, vijay.kil...@gmail.com wrote:
>>
>> +static inline void prefetch_vector_loop(const VECTYPE *p, int index)
>> +{
>> +#if defined(__aarch64__)
>> +if (is_thunderx_pass2_cpu()) {
>> +/* Prefetch 4 cache l
On 08/16/2016 05:02 AM, vijay.kil...@gmail.com wrote:
+static inline void prefetch_vector_loop(const VECTYPE *p, int index)
+{
+#if defined(__aarch64__)
+if (is_thunderx_pass2_cpu()) {
+/* Prefetch 4 cache lines ahead from index */
+VEC_PREFETCH(p, index + (BUFFER_FIND_NONZERO
From: Vijaya Kumar K
Thunderx pass2 chip requires explicit prefetch
instruction to give prefetch hint.
To speed up live migration on Thunderx platform,
prefetch instruction is added in zero buffer check
function.
The below results show live migration time improvement
with prefetch instruction w
