On 6 September 2013 18:19, Lluís Vilanova wrote:
> Fam Zheng writes:
> [...]
>> Because $(obj) here is './block', instead of '../block'. This doesn't
>> hurt compiling because we basically build all .o from top Makefile,
>> before entering Makefile.target, but it will affact arriving per-object
>>
Il 09/09/2013 03:34, Fam Zheng ha scritto:
> On Fri, 09/06 20:19, Lluís Vilanova wrote:
>> Fam Zheng writes:
>> [...]
>>> Because $(obj) here is './block', instead of '../block'. This doesn't
>>> hurt compiling because we basically build all .o from top Makefile,
>>> before entering Makefile.target
On Fri, 09/06 20:19, Lluís Vilanova wrote:
> Fam Zheng writes:
> [...]
> > Because $(obj) here is './block', instead of '../block'. This doesn't
> > hurt compiling because we basically build all .o from top Makefile,
> > before entering Makefile.target, but it will affact arriving per-object
> > li
Fam Zheng writes:
[...]
> Because $(obj) here is './block', instead of '../block'. This doesn't
> hurt compiling because we basically build all .o from top Makefile,
> before entering Makefile.target, but it will affact arriving per-object
> libs support.
I'm curious. What's the reason to not use
Makefile.target includes rule.mak and unnested common-obj-y, then prefix
them with '../', this will ignore object specific QEMU_CFLAGS in subdir
Makefile.objs:
$(obj)/curl.o: QEMU_CFLAGS += $(CURL_CFLAGS)
Because $(obj) here is './block', instead of '../block'. This doesn't
hurt compiling bec
