Re: [Qemu-devel] [RFC 3/4] ahci: Add allwinner AHCI

2015-10-26 Thread Peter Crosthwaite
On Tue, Oct 13, 2015 at 11:28 AM, Beniamino Galvani wrote: > On Sun, Oct 11, 2015 at 09:21:35AM -0700, Peter Crosthwaite wrote: >> --- a/hw/ide/ahci.c >> +++ b/hw/ide/ahci.c >> @@ -1692,9 +1692,107 @@ static const TypeInfo sysbus_ahci_info = { >> .class_init= sysbus_ahci_class_init, >> }

Re: [Qemu-devel] [RFC 3/4] ahci: Add allwinner AHCI

2015-10-13 Thread Beniamino Galvani
On Sun, Oct 11, 2015 at 09:21:35AM -0700, Peter Crosthwaite wrote: > --- a/hw/ide/ahci.c > +++ b/hw/ide/ahci.c > @@ -1692,9 +1692,107 @@ static const TypeInfo sysbus_ahci_info = { > .class_init= sysbus_ahci_class_init, > }; > > +#define ALLWINNER_AHCI_MMIO_OFF 0x80 > +#define ALLWINNER

Re: [Qemu-devel] [RFC 3/4] ahci: Add allwinner AHCI

2015-10-12 Thread Peter Crosthwaite
On Mon, Oct 12, 2015 at 4:09 PM, John Snow wrote: > Is there any spec or documentation I can cross-reference this against? > Not that I know of. I am running off a combination of experiments (looking at messages from P1) and the Linux driver source. > I gather this exists within the vendor-speci

Re: [Qemu-devel] [RFC 3/4] ahci: Add allwinner AHCI

2015-10-12 Thread John Snow
Is there any spec or documentation I can cross-reference this against? I gather this exists within the vendor-specific reserved region from 0xA0 to 0xFF just prior to the port registers, so this all /looks/ like it's right, I just don't have any way to verify it. On 10/11/2015 12:21 PM, Peter Cro

[Qemu-devel] [RFC 3/4] ahci: Add allwinner AHCI

2015-10-11 Thread Peter Crosthwaite
Add a Sysbus AHCI subclass for the Allwinner AHCI. It has a few extra vendor specific registers that are used for phy and power init. Signed-off-by: Peter Crosthwaite --- hw/ide/ahci.c | 98 +++ hw/ide/ahci.h | 16 ++ 2 files change