Thanks Paolo,
Paolo Bonzini 于2018年9月10日周一 上午7:11写道：
> On 07/09/2018 08:32, Li Qiang wrote:
> > Hello all,
> >
> > I want to know why the i440FX in the following 'info qtree' information
> is
> > laid under the pci.0 bus. In the chip spec here:
> > -->https://wiki.qemu.org/images/b/bb/29054901.p
On 07/09/2018 08:32, Li Qiang wrote:
> Hello all,
>
> I want to know why the i440FX in the following 'info qtree' information is
> laid under the pci.0 bus. In the chip spec here:
> -->https://wiki.qemu.org/images/b/bb/29054901.pdf
> I don't see this device.
>
> Can anyone give me some hints?
Hello all,
I want to know why the i440FX in the following 'info qtree' information is
laid under the pci.0 bus. In the chip spec here:
-->https://wiki.qemu.org/images/b/bb/29054901.pdf
I don't see this device.
Can anyone give me some hints?
Thanks,
Li Qiang
bus: main-system-bus
type System
