Re: [Qemu-devel] [QEMU-PPC] [PATCH] ppc/tcg: Ignore bit 6 in the eieio instruction

2018-07-01 Thread Suraj Jitindar Singh
On Fri, 2018-06-29 at 16:29 +1000, David Gibson wrote: > On Fri, Jun 29, 2018 at 04:20:24PM +1000, Suraj Jitindar Singh wrote: > > The kernel patch > > "powerpc/64s: Add support for a store forwarding barrier at kernel > > entry/exit" > > adds an eieio barrier instruction to kernel entry and exit p

Re: [Qemu-devel] [QEMU-PPC] [PATCH] ppc/tcg: Ignore bit 6 in the eieio instruction

2018-06-28 Thread David Gibson
On Fri, Jun 29, 2018 at 04:20:24PM +1000, Suraj Jitindar Singh wrote: > The kernel patch > "powerpc/64s: Add support for a store forwarding barrier at kernel entry/exit" > adds an eieio barrier instruction to kernel entry and exit points on > the POWER9 platform. The eieio instruction form used has

[Qemu-devel] [QEMU-PPC] [PATCH] ppc/tcg: Ignore bit 6 in the eieio instruction

2018-06-28 Thread Suraj Jitindar Singh
The kernel patch "powerpc/64s: Add support for a store forwarding barrier at kernel entry/exit" adds an eieio barrier instruction to kernel entry and exit points on the POWER9 platform. The eieio instruction form used has bit 6 set. This bit is ignored by hardware however under tcg it causes an ill