On 10/14/2015 12:40 AM, Sergey Fedorov wrote:
Otherwise, "!(tb_end <= start || tb_start >= end)" condition
check will fail
...
So we either
need to change the condition in tb_invalidate_phys_page_range() or do
the PC advancement trick during translation, no matter can instructions
cross a page
On 13.10.2015 03:13, Richard Henderson wrote:
> On 10/10/2015 12:34 AM, Sergey Fedorov wrote:
>>> @@ -2936,6 +2927,10 @@ static inline void
>>> gen_intermediate_code_internal(AlphaCPU *cpu,
>>> tcg_gen_insn_start(ctx.pc);
>>> num_insns++;
>>>
>>> +if (unlikely(cpu_brea
On 13 October 2015 at 01:13, Richard Henderson wrote:
> Why do you believe that a zero-length TB won't be cleared?
> The TB still has a start address, which is contained within
> a given page, which is invalidated.
>
> Some target-*/translate.c takes care to advance the PC, but I believe that
> th
On 10/10/2015 12:34 AM, Sergey Fedorov wrote:
@@ -2936,6 +2927,10 @@ static inline void
gen_intermediate_code_internal(AlphaCPU *cpu,
tcg_gen_insn_start(ctx.pc);
num_insns++;
+if (unlikely(cpu_breakpoint_test(cs, ctx.pc, BP_ANY))) {
+gen_excp(&ctx, EXCP_D
On 07.10.2015 12:43, Richard Henderson wrote:
> Reduce the boilerplate required for each target. At the same time,
> move the test for breakpoint after calling tcg_gen_insn_start.
>
> Note that arm and aarch64 do not use cpu_breakpoint_test, but still
> move the inline test down after tcg_gen_insn
Reduce the boilerplate required for each target. At the same time,
move the test for breakpoint after calling tcg_gen_insn_start.
Note that arm and aarch64 do not use cpu_breakpoint_test, but still
move the inline test down after tcg_gen_insn_start.
Reviewed-by: Aurelien Jarno
Reviewed-by: Pete
