Re: [Qemu-devel] [PATCHv2] target-arm: Implement AArch64 OSLSR_EL1 sysreg

2015-10-05 Thread Alistair Francis
On Mon, Oct 5, 2015 at 2:25 PM, Davorin Mista wrote: > Thanks Peter, I've made all changes as you suggested, but there is no > property "ARM_CP_NO_RAW", there's also nothing similar to it defined in > cpu.h, here's all the options: > > #define ARM_CP_SPECIAL 1 > #define ARM_CP_CONST 2 > #define AR

Re: [Qemu-devel] [PATCHv2] target-arm: Implement AArch64 OSLSR_EL1 sysreg

2015-10-05 Thread Davorin Mista
Thanks Peter, I've made all changes as you suggested, but there is no property "ARM_CP_NO_RAW", there's also nothing similar to it defined in cpu.h, here's all the options: #define ARM_CP_SPECIAL 1 #define ARM_CP_CONST 2 #define ARM_CP_64BIT 4 #define ARM_CP_SUPPRESS_TB_END 8 #define ARM_CP_OVE

Re: [Qemu-devel] [PATCHv2] target-arm: Implement AArch64 OSLSR_EL1 sysreg

2015-10-05 Thread Peter Maydell
On 5 October 2015 at 20:56, Davorin Mista wrote: > Added oslsr_write function to OSLAR_EL1 sysreg, using a status variable > in ARMCPUState struct (os_lock_status). > > Linux reads from this register during its suspend/resume procedure. > > Signed-off-by: Davorin Mista Thanks for this patch. I'm

[Qemu-devel] [PATCHv2] target-arm: Implement AArch64 OSLSR_EL1 sysreg

2015-10-05 Thread Davorin Mista
Added oslsr_write function to OSLAR_EL1 sysreg, using a status variable in ARMCPUState struct (os_lock_status). Linux reads from this register during its suspend/resume procedure. Signed-off-by: Davorin Mista --- Changed in v2: -switched from using dummy registers to an actual register impleme