Hi Peter,
On 09/03/18 15:18, Peter Maydell wrote:
> On 9 March 2018 at 14:03, Auger Eric wrote:
>> On 08/03/18 18:49, Peter Maydell wrote:
+#define smmuv3_eventq_irq_enabled(s) \
+(FIELD_EX32(s->irq_ctrl, IRQ_CTRL, EVENTQ_IRQEN))
+#define smmuv3_gerror_irq_ena
On 9 March 2018 at 14:03, Auger Eric wrote:
> On 08/03/18 18:49, Peter Maydell wrote:
>>> +#define smmuv3_eventq_irq_enabled(s) \
>>> +(FIELD_EX32(s->irq_ctrl, IRQ_CTRL, EVENTQ_IRQEN))
>>> +#define smmuv3_gerror_irq_enabled(s) \
>>> +(FIELD_EX32(s->irq_ct
Hi Peter,
On 08/03/18 18:49, Peter Maydell wrote:
> On 17 February 2018 at 18:46, Eric Auger wrote:
>> We introduce some helpers to handle wired IRQs and especially
>> GERROR interrupt. SMMU writes GERROR register on GERROR event
>> and SW acks GERROR interrupts by setting GERRORn.
>>
>> The Wire
On 17 February 2018 at 18:46, Eric Auger wrote:
> We introduce some helpers to handle wired IRQs and especially
> GERROR interrupt. SMMU writes GERROR register on GERROR event
> and SW acks GERROR interrupts by setting GERRORn.
>
> The Wired interrupts are edge sensitive hence the pulse usage.
>
>
We introduce some helpers to handle wired IRQs and especially
GERROR interrupt. SMMU writes GERROR register on GERROR event
and SW acks GERROR interrupts by setting GERRORn.
The Wired interrupts are edge sensitive hence the pulse usage.
Signed-off-by: Eric Auger
---
v7 -> v8:
- remove SMMU_PEN
