Re: [Qemu-devel] [PATCH v8 26/35] RISC-V: Update CSR and interrupt definitions

2018-05-03 Thread Michael Clark
On Fri, May 4, 2018 at 8:56 AM, Alistair Francis wrote: > On Wed, Apr 25, 2018 at 5:02 PM Michael Clark wrote: > > > * Add user-mode CSR defininitions. > > * Reorder CSR definitions to match the specification. > > * Change H mode interrupt comment to 'reserved'. > > * Remove unused X_COP interru

Re: [Qemu-devel] [PATCH v8 26/35] RISC-V: Update CSR and interrupt definitions

2018-05-03 Thread Alistair Francis
On Wed, Apr 25, 2018 at 5:02 PM Michael Clark wrote: > * Add user-mode CSR defininitions. > * Reorder CSR definitions to match the specification. > * Change H mode interrupt comment to 'reserved'. > * Remove unused X_COP interrupt. > * Add user-mode and core-level interrupts. > * Remove erroneous

[Qemu-devel] [PATCH v8 26/35] RISC-V: Update CSR and interrupt definitions

2018-04-25 Thread Michael Clark
* Add user-mode CSR defininitions. * Reorder CSR definitions to match the specification. * Change H mode interrupt comment to 'reserved'. * Remove unused X_COP interrupt. * Add user-mode and core-level interrupts. * Remove erroneous until comemnts on machine mode interrupts. * Move together paging