Re: [Qemu-devel] [PATCH v8 18/23] RISC-V VirtIO Machine

2018-04-30 Thread Peter Maydell
On 30 April 2018 at 01:18, Michael Clark wrote: > Quite a bit of our initialization code in several QOM classes allocate > memory that is not freed. e.g. the PLIC. Usually these functions are only > run once, but ideally all of the code should be memory clean. i.e. exit > without leaks. Many progr

Re: [Qemu-devel] [PATCH v8 18/23] RISC-V VirtIO Machine

2018-04-29 Thread Michael Clark
On Sat, Apr 28, 2018 at 2:17 AM, Peter Maydell wrote: > On 2 March 2018 at 13:51, Michael Clark wrote: > > RISC-V machine with device-tree, 16550a UART and VirtIO MMIO. > > The following machine is implemented: > > > > - 'virt'; CLINT, PLIC, 16550A UART, VirtIO MMIO, device-tree > > > > Acked-by

Re: [Qemu-devel] [PATCH v8 18/23] RISC-V VirtIO Machine

2018-04-27 Thread Peter Maydell
On 2 March 2018 at 13:51, Michael Clark wrote: > RISC-V machine with device-tree, 16550a UART and VirtIO MMIO. > The following machine is implemented: > > - 'virt'; CLINT, PLIC, 16550A UART, VirtIO MMIO, device-tree > > Acked-by: Richard Henderson > Signed-off-by: Palmer Dabbelt > Signed-off-by:

[Qemu-devel] [PATCH v8 18/23] RISC-V VirtIO Machine

2018-03-02 Thread Michael Clark
RISC-V machine with device-tree, 16550a UART and VirtIO MMIO. The following machine is implemented: - 'virt'; CLINT, PLIC, 16550A UART, VirtIO MMIO, device-tree Acked-by: Richard Henderson Signed-off-by: Palmer Dabbelt Signed-off-by: Michael Clark --- hw/riscv/virt.c | 420 +++