Re: [Qemu-devel] [PATCH v8 00/23] RISC-V QEMU Port Submission

2018-03-09 Thread Richard W.M. Jones
On Fri, Mar 09, 2018 at 04:43:34PM +, Peter Maydell wrote: > On 5 March 2018 at 08:41, Richard W.M. Jones wrote: > > > > The attached patch is also needed to avoid crashes during various > > math-heavy test suites. > > Applied to master, thanks. > > FYI, sending patches as attachments in the

Re: [Qemu-devel] [PATCH v8 00/23] RISC-V QEMU Port Submission

2018-03-09 Thread Peter Maydell
On 5 March 2018 at 08:41, Richard W.M. Jones wrote: > > The attached patch is also needed to avoid crashes during various > math-heavy test suites. Applied to master, thanks. FYI, sending patches as attachments in the middle of a long thread on something else is a good way to cause them to get l

Re: [Qemu-devel] [PATCH v8 00/23] RISC-V QEMU Port Submission

2018-03-09 Thread Michael Clark
On Mon, Mar 5, 2018 at 9:41 PM, Richard W.M. Jones wrote: > > The attached patch is also needed to avoid crashes during various > math-heavy test suites. > Thanks. I missed your email. I've integrated this and the other outstanding patches into the `riscv-all` branch in the riscv repo here. -

Re: [Qemu-devel] [PATCH v8 00/23] RISC-V QEMU Port Submission

2018-03-05 Thread Alex Bennée
Richard W.M. Jones writes: > The attached patch is also needed to avoid crashes during various > math-heavy test suites. > > Rich. > > -- > From: Stef O'Rear > Date: Sat, 3 Mar 2018 03:46:00 -0800 > Subject: [PATCH] softfloat: fix crash on int conversion of SNaN > > Signed-off-by: Stef O'Rear

Re: [Qemu-devel] [PATCH v8 00/23] RISC-V QEMU Port Submission

2018-03-05 Thread Richard W.M. Jones
The attached patch is also needed to avoid crashes during various math-heavy test suites. Rich. -- Richard Jones, Virtualization Group, Red Hat http://people.redhat.com/~rjones Read my programming and virtualization blog: http://rwmj.wordpress.com virt-p2v converts physical machines to virtual

Re: [Qemu-devel] [PATCH v8 00/23] RISC-V QEMU Port Submission

2018-03-02 Thread no-reply
Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 1519998711-73430-1-git-send-email-...@sifive.com Subject: [Qemu-devel] [PATCH v8 00/23] RISC-V QEMU Port Submission === TEST SCRIPT BEGIN === #!/bin/bash BASE=base n=1

[Qemu-devel] [PATCH v8 00/23] RISC-V QEMU Port Submission

2018-03-02 Thread Michael Clark
QEMU RISC-V Emulation Support (RV64GC, RV32GC) This release renames the SiFive machines to sifive_e and sifive_u to represent the SiFive Everywhere and SiFive Unleashed platforms. SiFive has configurable soft-core IP, so it is intended that these machines will be extended to enable a variety of Si