On 27 October 2014 06:57, Peter Maydell wrote:
> On 26 October 2014 22:30, Peter Maydell wrote:
> > In fact, since all of the "exception is not taken" cases are for
> > "we are in secure EL3 and the exception is not being routed to
> > secure EL3" you could just make all those entries read "1" a
On 26 October 2014 22:30, Peter Maydell wrote:
> In fact, since all of the "exception is not taken" cases are for
> "we are in secure EL3 and the exception is not being routed to
> secure EL3" you could just make all those entries read "1" and
> rely on the "target_el < current_el" check. That doe
On 24 October 2014 23:43, Greg Bellows wrote:
> Based on our discussion, I looked into a table lookup approach to replace
> the arm_phys_excp_target_el() as we discussed. I have something working but
> still need to verify it is 100% correct. Before I went much further, I
> thought I'd share my
Hi Peter,
Based on our discussion, I looked into a table lookup approach to replace
the arm_phys_excp_target_el() as we discussed. I have something working
but still need to verify it is 100% correct. Before I went much further, I
thought I'd share my findings.
In order to do the table in a way
On 21 October 2014 17:55, Greg Bellows wrote:
> From: Fabian Aggeler
>
> This patch extends arm_excp_unmasked() according to ARM ARMv7 and
> ARM ARMv8 (all EL running in AArch32) and adds comments.
>
> If EL3 is using AArch64 IRQ/FIQ masking is ignored in
> all exception levels other than EL3 if
From: Fabian Aggeler
This patch extends arm_excp_unmasked() according to ARM ARMv7 and
ARM ARMv8 (all EL running in AArch32) and adds comments.
If EL3 is using AArch64 IRQ/FIQ masking is ignored in
all exception levels other than EL3 if SCR.{FIQ|IRQ} is
set to 1 (routed to EL3).
Signed-off-by:
