On Thu, Sep 22, 2016 at 01:55:38PM +0800, Peter Xu wrote:
> On Thu, Sep 22, 2016 at 03:24:43PM +1000, David Gibson wrote:
> > On Wed, Sep 21, 2016 at 12:58:56PM +0800, Peter Xu wrote:
> > > Intel vIOMMU is still lacking of a complete IOMMU notifier mechanism.
> > > Before that is achieved, let's op
On Thu, Sep 22, 2016 at 09:44:10AM +0200, Paolo Bonzini wrote:
>
>
> On 22/09/2016 07:55, Peter Xu wrote:
> > I posted patch 3 just to make sure everything is coherent, and let
> > Paolo decide which way to choose (since I still think it's okay
> > actually... but again both are ok to me). Also i
On 22/09/2016 07:55, Peter Xu wrote:
> I posted patch 3 just to make sure everything is coherent, and let
> Paolo decide which way to choose (since I still think it's okay
> actually... but again both are ok to me). Also it'll be easier for
> Jason to track this down as well (so when Jason sees t
On Thu, Sep 22, 2016 at 03:24:43PM +1000, David Gibson wrote:
> On Wed, Sep 21, 2016 at 12:58:56PM +0800, Peter Xu wrote:
> > Intel vIOMMU is still lacking of a complete IOMMU notifier mechanism.
> > Before that is achieved, let's open a door for vhost DMAR support, which
> > only requires cache in
On Wed, Sep 21, 2016 at 12:58:56PM +0800, Peter Xu wrote:
> Intel vIOMMU is still lacking of a complete IOMMU notifier mechanism.
> Before that is achieved, let's open a door for vhost DMAR support, which
> only requires cache invalidations (UNMAP operations).
>
> Meanwhile, converting hw_error()
Intel vIOMMU is still lacking of a complete IOMMU notifier mechanism.
Before that is achieved, let's open a door for vhost DMAR support, which
only requires cache invalidations (UNMAP operations).
Meanwhile, converting hw_error() to error_report() and exit(1), to make
the error messages clean and
