Re: [Qemu-devel] [PATCH v6 26/37] target-arm: Implement ISR_EL1 register

2014-04-13 Thread Peter Crosthwaite
On Fri, Apr 11, 2014 at 2:15 AM, Peter Maydell wrote: > Implement the ISR_EL1 register. This is actually present in > ARMv7 as well but was previously unimplemented. It is a > read-only register that indicates whether interrupts are > currently pending. > > Signed-off-by: Peter Maydell Reviewed-

[Qemu-devel] [PATCH v6 26/37] target-arm: Implement ISR_EL1 register

2014-04-10 Thread Peter Maydell
Implement the ISR_EL1 register. This is actually present in ARMv7 as well but was previously unimplemented. It is a read-only register that indicates whether interrupts are currently pending. Signed-off-by: Peter Maydell --- target-arm/helper.c | 18 ++ 1 file changed, 18 inserti