On 09/18/2012 06:41 AM, Peter Crosthwaite wrote:
Ping!
Igor, are you able to provide a diff of this patch so I can send the
next revision?
Sure, but I still don't understand what to do with QEMU-lockup issue, I
believe the same topic was discussed here
http://thread.gmane.org/gmane.comp.emul
Ping!
Igor, are you able to provide a diff of this patch so I can send the
next revision?
Regards,
Peter
On Mon, 2012-08-06 at 16:29 +0400, Igor Mitsyanko wrote:
> On 08/06/2012 02:56 PM, Peter Maydell wrote:
> > On 6 August 2012 04:25, Peter A. G. Crosthwaite
> > wrote:
> >
> >> +static uint64
On 08/06/2012 02:56 PM, Peter Maydell wrote:
On 6 August 2012 04:25, Peter A. G. Crosthwaite
wrote:
+static uint64_t
+exynos4210_sdhci_readfn(void *opaque, target_phys_addr_t offset, unsigned size)
+{
+Exynos4SDHCIState *s = (Exynos4SDHCIState *)opaque;
+uint32_t ret;
+
+switch (of
On 6 August 2012 04:25, Peter A. G. Crosthwaite
wrote:
> +static uint64_t
> +exynos4210_sdhci_readfn(void *opaque, target_phys_addr_t offset, unsigned
> size)
> +{
> +Exynos4SDHCIState *s = (Exynos4SDHCIState *)opaque;
> +uint32_t ret;
> +
> +switch (offset & ~0x3) {
> +case SDHC
From: Igor Mitsyanko
Custom Exynos4210 SD/MMC host controller, based on SD association standard host
controller ver. 2.00.
Signed-off-by: Igor Mitsyanko
---
changed from v5 (Igor):
Updated for new IRQ system
changed from v4 (Igor):
set irq on SLOTINT status instead of interrupt registers status
