Re: [Qemu-devel] [PATCH v6 06/32] target-arm: A32: Emulate the SMC instruction

2014-10-13 Thread Greg Bellows
I reapplied my changes on top of your v5 with the latest backing. It basically scraps most of my changes on this patch for yours, except for some slight updates here and there. I'll continue to make any v7 updates on your v5 set. Greg On 13 October 2014 08:36, Peter Maydell wrote: > On 13 Oct

Re: [Qemu-devel] [PATCH v6 06/32] target-arm: A32: Emulate the SMC instruction

2014-10-13 Thread Peter Maydell
On 13 October 2014 15:13, Greg Bellows wrote: > I realize that, but I don't believe your changes were available yet and > still sounded to be a bit in flux, so I was waiting to merge. > > As I mentioned previously, I had already merged on top of your initial > changes. Ah. I thought when you said

Re: [Qemu-devel] [PATCH v6 06/32] target-arm: A32: Emulate the SMC instruction

2014-10-13 Thread Greg Bellows
I realize that, but I don't believe your changes were available yet and still sounded to be a bit in flux, so I was waiting to merge. As I mentioned previously, I had already merged on top of your initial changes. I'll recommit with your changes. Greg On 13 October 2014 08:06, Peter Maydell wr

Re: [Qemu-devel] [PATCH v6 06/32] target-arm: A32: Emulate the SMC instruction

2014-10-13 Thread Peter Maydell
On 10 October 2014 18:03, Greg Bellows wrote: > From: Fabian Aggeler > > Implements SMC instruction in AArch32 using the A32 syndrome. When executing > SMC instruction from monitor CPU mode SCR.NS bit is reset. > > Signed-off-by: Sergey Fedorov > Signed-off-by: Fabian Aggeler > Signed-off-by: G

[Qemu-devel] [PATCH v6 06/32] target-arm: A32: Emulate the SMC instruction

2014-10-10 Thread Greg Bellows
From: Fabian Aggeler Implements SMC instruction in AArch32 using the A32 syndrome. When executing SMC instruction from monitor CPU mode SCR.NS bit is reset. Signed-off-by: Sergey Fedorov Signed-off-by: Fabian Aggeler Signed-off-by: Greg Bellows == v5 -> v6 - Fixed PC offsetting for