On Fri, Jan 31, 2014 at 06:09:20PM +, Peter Maydell wrote:
> On 28 January 2014 20:32, Christoffer Dall
> wrote:
[...]
>
> This looks broadly right; a couple of comments below.
>
[...]
> > +
> > +static void gic_set_irq_generic(GICState *s, int irq, int level,
> > +
On 28 January 2014 20:32, Christoffer Dall wrote:
> The existing implementation of the pending behavior in gic_set_irq,
> gic_acknowledge_irq, gic_complete_irq, and the distributor pending
> set/clear registers does not follow the semantics of the GICv2.0 specs,
> but may implement the 11MPCore su
The existing implementation of the pending behavior in gic_set_irq,
gic_acknowledge_irq, gic_complete_irq, and the distributor pending
set/clear registers does not follow the semantics of the GICv2.0 specs,
but may implement the 11MPCore support. Therefore, maintain the
existing semantics for 11MP
