Re: [Qemu-devel] [PATCH v5 3/4] target-arm: Add 32/64-bit register sync

2015-02-11 Thread Peter Maydell
On 12 February 2015 at 02:59, Greg Bellows wrote: > Add AArch32 to AArch64 register sychronization functions. > Replace manual register synchronization with new functions in > aarch64_cpu_do_interrupt() and HELPER(exception_return)(). > > Signed-off-by: Greg Bellows > > --- > > v4 -> v5 > - Rewor

[Qemu-devel] [PATCH v5 3/4] target-arm: Add 32/64-bit register sync

2015-02-11 Thread Greg Bellows
Add AArch32 to AArch64 register sychronization functions. Replace manual register synchronization with new functions in aarch64_cpu_do_interrupt() and HELPER(exception_return)(). Signed-off-by: Greg Bellows --- v4 -> v5 - Rework sync routines a bit more. v3 -> v4 - Rework sync routines to cove