On Mon, Nov 16, 2015 at 05:44:35PM +0100, Andreas Färber wrote:
> Am 16.11.2015 um 10:38 schrieb Andreas Färber:
> > Am 16.11.2015 um 09:16 schrieb Christian Borntraeger:
> >> On 11/16/2015 08:13 AM, Pavel Fedin wrote:
> >> (process:4102): GLib-CRITICAL **: g_hash_table_iter_next: assertion
> >
Am 16.11.2015 um 10:38 schrieb Andreas Färber:
> Am 16.11.2015 um 09:16 schrieb Christian Borntraeger:
>> On 11/16/2015 08:13 AM, Pavel Fedin wrote:
>> (process:4102): GLib-CRITICAL **: g_hash_table_iter_next: assertion
>> 'ri->version == ri->hash_table->version' failed
>>
>> (proce
Hello!
> My idea, which I wanted to investigate after the weekend, is iterating
> through the hashtable to create a list of prop->release functions and
> call them only after finishing the iteration. That might not work
> either, so we may need to loop over the releasing to allow for released
> p
On Fri, Nov 13, 2015 at 10:00:58PM +0100, Christian Borntraeger wrote:
> On 11/13/2015 07:14 PM, Andreas Färber wrote:
> > Am 13.10.2015 um 14:37 schrieb Daniel P. Berrange:
> >> From: Pavel Fedin
> >>
> >> ARM GICv3 systems with large number of CPUs create lots of IRQ pins. Since
> >> every pin i
On 13/11/2015 22:25, Andreas Färber wrote:
> Thanks! sclp_init() seems to violate several QOM design principles in
> that it uses object_new() during TypeInfo::instance_init()
There's nothing wrong with that. It's wrong however to use
qdev_set_parent_bus in instance_init. That should be moved
On 11/16/2015 08:13 AM, Pavel Fedin wrote:
> Hello!
>
(process:4102): GLib-CRITICAL **: g_hash_table_iter_next: assertion
'ri->version == ri->hash_table->version' failed
(process:4102): GLib-CRITICAL **: g_hash_table_iter_next: assertion
'ri->version == ri->hash_table->ve
Am 16.11.2015 um 09:53 schrieb Paolo Bonzini:
> On 13/11/2015 22:25, Andreas Färber wrote:
>> Thanks! sclp_init() seems to violate several QOM design principles in
>> that it uses object_new() during TypeInfo::instance_init()
>
> There's nothing wrong with that. It's wrong however to use
> qdev_s
On 16/11/2015 10:48, Andreas Färber wrote:
> > > Thanks! sclp_init() seems to violate several QOM design principles in
> > > that it uses object_new() during TypeInfo::instance_init()
> >
> > There's nothing wrong with that. It's wrong however to use
> > qdev_set_parent_bus in instance_init. T
Hello!
> >> (process:4102): GLib-CRITICAL **: g_hash_table_iter_next: assertion
> >> 'ri->version == ri->hash_table->version' failed
> >>
> >> (process:4102): GLib-CRITICAL **: g_hash_table_iter_next: assertion
> >> 'ri->version == ri->hash_table->version' failed
> >>
> >> (process:4102): GLib-CR
Am 16.11.2015 um 09:16 schrieb Christian Borntraeger:
> On 11/16/2015 08:13 AM, Pavel Fedin wrote:
> (process:4102): GLib-CRITICAL **: g_hash_table_iter_next: assertion
> 'ri->version == ri->hash_table->version' failed
>
> (process:4102): GLib-CRITICAL **: g_hash_table_iter_next: as
Am 13.11.2015 um 22:00 schrieb Christian Borntraeger:
> On 11/13/2015 07:14 PM, Andreas Färber wrote:
>> Am 13.10.2015 um 14:37 schrieb Daniel P. Berrange:
>>> From: Pavel Fedin
>>>
>>> ARM GICv3 systems with large number of CPUs create lots of IRQ pins. Since
>>> every pin is represented as a pro
On 11/13/2015 07:14 PM, Andreas Färber wrote:
> Am 13.10.2015 um 14:37 schrieb Daniel P. Berrange:
>> From: Pavel Fedin
>>
>> ARM GICv3 systems with large number of CPUs create lots of IRQ pins. Since
>> every pin is represented as a property, number of these properties becomes
>> very large. Ever
Am 13.10.2015 um 14:37 schrieb Daniel P. Berrange:
> From: Pavel Fedin
>
> ARM GICv3 systems with large number of CPUs create lots of IRQ pins. Since
> every pin is represented as a property, number of these properties becomes
> very large. Every property add first makes sure there's no duplicate
Hello!
> > > -QTAILQ_FOREACH(prop, &obj->parent->properties, node) {
> > > +g_hash_table_iter_init(&iter, obj->parent->properties);
> > > +while (g_hash_table_iter_next(&iter, NULL, (gpointer *)&prop)) {
> >
> > Is this cast needed?
>
> Probably not, as any pointer should coerce to v
On Thu, Nov 05, 2015 at 07:05:48PM +0100, Andreas Färber wrote:
> Am 13.10.2015 um 14:37 schrieb Daniel P. Berrange:
> > From: Pavel Fedin
> >
> > ARM GICv3 systems with large number of CPUs create lots of IRQ pins. Since
> > every pin is represented as a property, number of these properties beco
Hello!
> > static void object_property_del_all(Object *obj)
> > {
> > -while (!QTAILQ_EMPTY(&obj->properties)) {
> > -ObjectProperty *prop = QTAILQ_FIRST(&obj->properties);
> > -
> > -QTAILQ_REMOVE(&obj->properties, prop, node);
> > +ObjectProperty *prop;
> > +GHashT
Am 13.10.2015 um 14:37 schrieb Daniel P. Berrange:
> From: Pavel Fedin
>
> ARM GICv3 systems with large number of CPUs create lots of IRQ pins. Since
> every pin is represented as a property, number of these properties becomes
> very large. Every property add first makes sure there's no duplicate
From: Pavel Fedin
ARM GICv3 systems with large number of CPUs create lots of IRQ pins. Since
every pin is represented as a property, number of these properties becomes
very large. Every property add first makes sure there's no duplicates.
Traversing the list becomes very slow, therefore qemu init
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