Le 01/11/2016 à 21:03, Laurent Vivier a écrit :
> diff --git a/target-m68k/op_helper.c b/target-m68k/op_helper.c
> index 48e02e4..a4bfa4e 100644
> +void HELPER(divull)(CPUM68KState *env, int numr, int regr, uint32_t den)
> +{
> +uint64_t num = deposit64(env->dregs[numr], 32, 32, env->dregs[reg
On 11/27/2016 09:42 AM, Laurent Vivier wrote:
> +env->dregs[destr] = deposit32(quot, 16, 16, rem);
> env->cc_z = quot;
> env->cc_n = quot;
quot is here a 32bit, but the result is only the 16 lower bits, so I
think we should have
env->cc_z = (int16_t)quot;
env->cc_n = (int1
Hi,
I come back on some patches as I've been able to test some instructions
using RISU.
Le 01/11/2016 à 21:03, Laurent Vivier a écrit :
...
> --- a/target-m68k/op_helper.c
> +++ b/target-m68k/op_helper.c
> @@ -179,51 +184,178 @@ void HELPER(raise_exception)(CPUM68KState *env,
> uint32_t tt)
>
On 11/01/2016 02:03 PM, Laurent Vivier wrote:
Update helper to set the throwing location in case of div-by-0.
Cleanup divX.w and add quad word variants of divX.l.
Signed-off-by: Laurent Vivier
---
linux-user/main.c | 7 ++
target-m68k/cpu.h | 4 --
target-m68k/helper.h| 8
Update helper to set the throwing location in case of div-by-0.
Cleanup divX.w and add quad word variants of divX.l.
Signed-off-by: Laurent Vivier
---
linux-user/main.c | 7 ++
target-m68k/cpu.h | 4 --
target-m68k/helper.h| 8 ++-
target-m68k/op_helper.c | 182
