On Mon, Jun 30, 2014 at 06:09:02PM -0500, greg.bell...@linaro.org wrote:
> From: Fabian Aggeler
>
> Define a new ARM CP register info list for the ARMv7 Security Extension
> feature. Register that list only for ARM cores with Security Extension/EL3
> support. Moving Aarch32 SCR into Security Exte
From: Fabian Aggeler
Define a new ARM CP register info list for the ARMv7 Security Extension
feature. Register that list only for ARM cores with Security Extension/EL3
support. Moving Aarch32 SCR into Security Extension register group.
Signed-off-by: Sergey Fedorov
Signed-off-by: Fabian Aggeler
