Re: [Qemu-devel] [PATCH v3 3/4] target-arm: Add 32/64-bit register sync

2015-02-05 Thread Peter Maydell
On 4 February 2015 at 23:37, Greg Bellows wrote: > Peter Maydell wrote: >> This doesn't look correct. If this CPU doesn't have the AArch64 >> feature then pretty much all of what this function does is wrong, >> because it is the "take exception to an EL that is using AArch64" >> function. > I thi

Re: [Qemu-devel] [PATCH v3 3/4] target-arm: Add 32/64-bit register sync

2015-02-04 Thread Greg Bellows
On Tue, Feb 3, 2015 at 12:54 PM, Peter Maydell wrote: > On 27 January 2015 at 23:58, Greg Bellows wrote: > > Add AArch32 to AArch64 register sychronization functions. > > Replace manual register synchronization with new functions in > > aarch64_cpu_do_interrupt() and HELPER(exception_return)().

Re: [Qemu-devel] [PATCH v3 3/4] target-arm: Add 32/64-bit register sync

2015-02-04 Thread Greg Bellows
On Tue, Feb 3, 2015 at 12:54 PM, Peter Maydell wrote: > On 27 January 2015 at 23:58, Greg Bellows wrote: > > Add AArch32 to AArch64 register sychronization functions. > > Replace manual register synchronization with new functions in > > aarch64_cpu_do_interrupt() and HELPER(exception_return)().

Re: [Qemu-devel] [PATCH v3 3/4] target-arm: Add 32/64-bit register sync

2015-02-03 Thread Peter Maydell
On 27 January 2015 at 23:58, Greg Bellows wrote: > Add AArch32 to AArch64 register sychronization functions. > Replace manual register synchronization with new functions in > aarch64_cpu_do_interrupt() and HELPER(exception_return)(). > > Signed-off-by: Greg Bellows > > --- > > v2 -> v3 > - Condit

[Qemu-devel] [PATCH v3 3/4] target-arm: Add 32/64-bit register sync

2015-01-27 Thread Greg Bellows
Add AArch32 to AArch64 register sychronization functions. Replace manual register synchronization with new functions in aarch64_cpu_do_interrupt() and HELPER(exception_return)(). Signed-off-by: Greg Bellows --- v2 -> v3 - Conditionalize interrupt handler update of aarch64. --- target-arm/helpe