Re: [Qemu-devel] [PATCH v3 23/28] riscv: sifive_u: Fix broken GEM support

2019-08-11 Thread Alistair Francis
On Sun, Aug 11, 2019 at 1:15 AM Bin Meng wrote: > > At present the GEM support in sifive_u machine is seriously broken. > > - The GEM block register base was set to a weird number (0x100900FC), > which for no way could work with the cadence_gem model in QEMU. > - The generated DT node for GEM ha

[Qemu-devel] [PATCH v3 23/28] riscv: sifive_u: Fix broken GEM support

2019-08-11 Thread Bin Meng
At present the GEM support in sifive_u machine is seriously broken. - The GEM block register base was set to a weird number (0x100900FC), which for no way could work with the cadence_gem model in QEMU. - The generated DT node for GEM has a "clocks-names" which is an invalid property name. Not