On 10/23/2016 10:55 PM, vijay.kil...@gmail.com wrote:
> +static uint64_t aarch64_midr_val;
> +uint64_t get_aarch64_cpu_id(void)
> +{
> +#ifdef CONFIG_LINUX
> +aarch64_midr_val = qemu_read_aarch64_midr_el1();
> +aarch64_midr_val &= CPU_MODEL_MASK;
> +
> +return aarch64_midr_val;
> +#else
On 24/10/2016 11:39, Dr. David Alan Gilbert wrote:
> * vijay.kil...@gmail.com (vijay.kil...@gmail.com) wrote:
>> From: Vijaya Kumar K
>>
>> Add helper API to read MIDR_EL1 registers to fetch
>> cpu identification information. This helps in
>> adding errata's and architecture specific features.
>
On Mon, Oct 24, 2016 at 3:09 PM, Dr. David Alan Gilbert
wrote:
> * vijay.kil...@gmail.com (vijay.kil...@gmail.com) wrote:
>> From: Vijaya Kumar K
>>
>> Add helper API to read MIDR_EL1 registers to fetch
>> cpu identification information. This helps in
>> adding errata's and architecture specific
* vijay.kil...@gmail.com (vijay.kil...@gmail.com) wrote:
> From: Vijaya Kumar K
>
> Add helper API to read MIDR_EL1 registers to fetch
> cpu identification information. This helps in
> adding errata's and architecture specific features.
>
> This is implemented only for arm architecture.
>
> Sig
From: Vijaya Kumar K
Add helper API to read MIDR_EL1 registers to fetch
cpu identification information. This helps in
adding errata's and architecture specific features.
This is implemented only for arm architecture.
Signed-off-by: Vijaya Kumar K
---
include/qemu/aarch64-cpuid.h | 9 +
u
