On 27.05.14 12:37, Alexey Kardashevskiy wrote:
This adds TM (Transactional Memory) SPRs.
Since TEXASRU is an upper half of TEXASR, special handling is needed here.
This adds two helpers: spr_read_prev_upper32()/spr_write_prev_upper32().
They read/write upper half of a previous 64bit SPR. Since
This adds TM (Transactional Memory) SPRs.
Since TEXASRU is an upper half of TEXASR, special handling is needed here.
This adds two helpers: spr_read_prev_upper32()/spr_write_prev_upper32().
They read/write upper half of a previous 64bit SPR. Since TEXASR and
TEXASRU have consequent numbers, that w
