Re: [Qemu-devel] [PATCH v2 14/23] hyperv: qom-ify SynIC

2017-07-07 Thread Igor Mammedov
On Fri, 7 Jul 2017 15:47:19 +0300 Roman Kagan wrote: > On Fri, Jul 07, 2017 at 02:22:20PM +0200, Igor Mammedov wrote: > > On Thu, 29 Jun 2017 20:51:01 +0300 > > Roman Kagan wrote: > > > > > On Thu, Jun 29, 2017 at 05:05:46PM +0200, Igor Mammedov wrote: > > > > On Wed, 21 Jun 2017 19:24:15 +

Re: [Qemu-devel] [PATCH v2 14/23] hyperv: qom-ify SynIC

2017-07-07 Thread Roman Kagan
On Fri, Jul 07, 2017 at 02:22:20PM +0200, Igor Mammedov wrote: > On Thu, 29 Jun 2017 20:51:01 +0300 > Roman Kagan wrote: > > > On Thu, Jun 29, 2017 at 05:05:46PM +0200, Igor Mammedov wrote: > > > On Wed, 21 Jun 2017 19:24:15 +0300 > > > Roman Kagan wrote: > [...] > > > > > > +if (cpu->hyp

Re: [Qemu-devel] [PATCH v2 14/23] hyperv: qom-ify SynIC

2017-07-07 Thread Igor Mammedov
On Thu, 29 Jun 2017 20:51:01 +0300 Roman Kagan wrote: > On Thu, Jun 29, 2017 at 05:05:46PM +0200, Igor Mammedov wrote: > > On Wed, 21 Jun 2017 19:24:15 +0300 > > Roman Kagan wrote: [...] > > > > +if (cpu->hyperv_synic) { > > > +if (kvm_vcpu_enable_cap(CPU(cpu), KVM_CAP_HYPERV_SYNI

Re: [Qemu-devel] [PATCH v2 14/23] hyperv: qom-ify SynIC

2017-06-29 Thread Roman Kagan
On Thu, Jun 29, 2017 at 05:05:46PM +0200, Igor Mammedov wrote: > On Wed, 21 Jun 2017 19:24:15 +0300 > Roman Kagan wrote: > > +static void synic_realize(DeviceState *dev, Error **errp) > > +{ > > +Object *obj = OBJECT(dev); > > +SynICState *synic = SYNIC(dev); > > + > > +synic->cpu = X8

Re: [Qemu-devel] [PATCH v2 14/23] hyperv: qom-ify SynIC

2017-06-29 Thread Igor Mammedov
On Wed, 21 Jun 2017 19:24:15 +0300 Roman Kagan wrote: > Make Hyper-V SynIC a device which is attached as a child to X86CPU. For > now it only makes SynIC visibile in the qom hierarchy, and maintains its > internal fields in sync with the respecitve msrs of the parent cpu (the > fields will be us

[Qemu-devel] [PATCH v2 14/23] hyperv: qom-ify SynIC

2017-06-21 Thread Roman Kagan
Make Hyper-V SynIC a device which is attached as a child to X86CPU. For now it only makes SynIC visibile in the qom hierarchy, and maintains its internal fields in sync with the respecitve msrs of the parent cpu (the fields will be used in followup patches). Signed-off-by: Roman Kagan --- v1 ->