Re: [Qemu-devel] [PATCH v2 05/11] target-arm: Implement ccmp branchless

2015-09-08 Thread Richard Henderson
On 09/08/2015 01:19 AM, Peter Maydell wrote: > The tcg common code isn't smart enough to notice it only > needs to calculate not(t1) once ? Correct, we do no value numbering or cse. > In the overwhelmingly common case (x86 tcg backend) > we would save an insn every time, right? Yes. It all depe

Re: [Qemu-devel] [PATCH v2 05/11] target-arm: Implement ccmp branchless

2015-09-08 Thread Peter Maydell
On 8 September 2015 at 06:18, Richard Henderson wrote: > On 09/07/2015 10:31 AM, Peter Maydell wrote: >>> >>> -if (cond < 0x0e) { /* continue */ >>> -gen_set_label(label_continue); >>> +/* If COND was false, force the flags to #nzcv. >>> + Note that T1 = (COND ? 0 : -1), T2 =

Re: [Qemu-devel] [PATCH v2 05/11] target-arm: Implement ccmp branchless

2015-09-07 Thread Richard Henderson
On 09/07/2015 10:31 AM, Peter Maydell wrote: -if (cond < 0x0e) { /* continue */ -gen_set_label(label_continue); +/* If COND was false, force the flags to #nzcv. + Note that T1 = (COND ? 0 : -1), T2 = (COND ? -1 : 0). */ +tcg_t1 = tcg_temp_new_i32(); +tcg_t2 = tcg_te

Re: [Qemu-devel] [PATCH v2 05/11] target-arm: Implement ccmp branchless

2015-09-07 Thread Peter Maydell
On 2 September 2015 at 18:57, Richard Henderson wrote: > This can allow much of a ccmp to be elided when particular > flags are subsequently dead. > > Signed-off-by: Richard Henderson > --- > target-arm/translate-a64.c | 65 > +++--- > 1 file changed, 44

[Qemu-devel] [PATCH v2 05/11] target-arm: Implement ccmp branchless

2015-09-02 Thread Richard Henderson
This can allow much of a ccmp to be elided when particular flags are subsequently dead. Signed-off-by: Richard Henderson --- target-arm/translate-a64.c | 65 +++--- 1 file changed, 44 insertions(+), 21 deletions(-) diff --git a/target-arm/translate-a64.c