Il 14/07/2013 12:23, liu ping fan ha scritto:
>> if the refcount ops are frequent enough, I strongly suspect cacheline
>> bouncing has a bigger effect than the memory barriers.
>>
> When out of biglock, object_ref/unref to pin the Device will be quite
> often, and can it be marked "frequent"? Or ho
On Sun, Jul 14, 2013 at 1:57 PM, Paolo Bonzini wrote:
> Il 14/07/2013 04:53, Liu Ping Fan ha scritto:
>> Refcnt's atomic inc/dec ops are frequent and its idiom need no seq_cst
>> order. So to get better performance, it worth to adopt _relaxed
>> other than _seq_cst memory model on them.
>>
>> We r
Il 14/07/2013 04:53, Liu Ping Fan ha scritto:
> Refcnt's atomic inc/dec ops are frequent and its idiom need no seq_cst
> order. So to get better performance, it worth to adopt _relaxed
> other than _seq_cst memory model on them.
>
> We resort to gcc builtins. If gcc supports C11 memory model, __at
Refcnt's atomic inc/dec ops are frequent and its idiom need no seq_cst
order. So to get better performance, it worth to adopt _relaxed
other than _seq_cst memory model on them.
We resort to gcc builtins. If gcc supports C11 memory model, __atomic_*
buitlins is used, otherwise __sync_* builtins.
S
