Re: [Qemu-devel] [PATCH v2] Undefine SWP instruction unless SCTLR.SW bit is set

2012-04-17 Thread Peter Maydell
On 17 April 2012 13:28, Alexey Starikovskiy wrote: > --- a/target-arm/translate.c > +++ b/target-arm/translate.c > @@ -7415,6 +7415,15 @@ static void disas_arm_insn(CPUARMState * env, > DisasContext *s) >                         } >                         tcg_temp_free(addr); >                  

[Qemu-devel] [PATCH v2] Undefine SWP instruction unless SCTLR.SW bit is set

2012-04-17 Thread Alexey Starikovskiy
ARM v7MP deprecates use of SWP instruction and only defines it if OS explicitly requests it via setting SCTLR.SW bit. Such a request is expected to occur only once during OS init, thus only static checking for this bit and flush of all translations is done on SCTLR change. Signed-off-by: Alexey St