Re: [Qemu-devel] [PATCH v1 4/5] xilinx_timer: Fix writes into TCSR register

2014-05-07 Thread Edgar E. Iglesias
On Thu, May 08, 2014 at 12:45:03PM +1000, Peter Crosthwaite wrote: > On Thu, May 8, 2014 at 11:35 AM, Edgar E. Iglesias > wrote: > > From: Guenter Roeck > > > > The TCSR register has only 11 valid bits. This is now used by the > > linux kernel to auto-detect endianness, and causes Linux 3.15-rc1

Re: [Qemu-devel] [PATCH v1 4/5] xilinx_timer: Fix writes into TCSR register

2014-05-07 Thread Peter Crosthwaite
On Thu, May 8, 2014 at 11:35 AM, Edgar E. Iglesias wrote: > From: Guenter Roeck > > The TCSR register has only 11 valid bits. This is now used by the > linux kernel to auto-detect endianness, and causes Linux 3.15-rc1 > and later to hang when run under qemu-microblaze. Mask valid bits > before wr

[Qemu-devel] [PATCH v1 4/5] xilinx_timer: Fix writes into TCSR register

2014-05-07 Thread Edgar E. Iglesias
From: Guenter Roeck The TCSR register has only 11 valid bits. This is now used by the linux kernel to auto-detect endianness, and causes Linux 3.15-rc1 and later to hang when run under qemu-microblaze. Mask valid bits before writing the register to solve the problem. Signed-off-by: Guenter Roeck