On 06/14/2017 01:00 PM, Thomas Huth wrote:
On 14.06.2017 09:56, David Hildenbrand wrote:
[...]
I think you should also mask the length with 0x if the PSW was
not in 64-bit mode? Or is this done automagically by the generated TCG
code already?
I was asking myself the same question, but
On 14.06.2017 09:56, David Hildenbrand wrote:
[...]
>> I think you should also mask the length with 0x if the PSW was
>> not in 64-bit mode? Or is this done automagically by the generated TCG
>> code already?
>
> I was asking myself the same question, but it shouldn't really matter as
> wa
>> Would it makes sense to
>>
>> a) move cpu_restore_state() into program_interrupt()
>> b) make all callers forward ra from GETPC() (problem with kvm code that
>> share handlers?)
>> c) fixup callers that already do the cpu_restore_state()
>> d) drop potential_page_fault() completely
>
> Yes, th
On 06/14/2017 12:22 AM, David Hildenbrand wrote:
+if (!(env->psw.mask & PSW_MASK_DAT)) {
+program_interrupt(env, PGM_SPECIAL_OP, 6);
+}
You should use restore_program_state before program_interrupt (or add a new
entry-point to do both). Then you can drop ...
restore_program_s
>> -static inline int cpu_mmu_index (CPUS390XState *env, bool ifetch)
>> +static inline bool psw_key_valid(CPUS390XState *env, uint8_t psw_key)
>> +{
>> +uint16_t pkm = ((env->cregs[3] & CR3_PKM) >> 16);
>
> Since you're storing the value in an uint16_t anyway, I think you could
> also do thi
On 13.06.2017 23:47, David Hildenbrand wrote:
> This adds support for the MOVE WITH OPTIONAL SPECIFICATIONS (MVCOS)
> instruction (in a relatively slow way). But it is enough to boot
> a linux kernel that uses it for uacccess (primary <-> seconardy).
>
> We are missing (as for most other part) low
On 14.06.2017 06:41, Richard Henderson wrote:
> On 06/13/2017 02:47 PM, David Hildenbrand wrote:
>> +static inline bool psw_key_valid(CPUS390XState *env, uint8_t psw_key)
>> +{
>> +uint16_t pkm = ((env->cregs[3] & CR3_PKM) >> 16);
>> +
>> +if (env->psw.mask & PSW_MASK_PSTATE) {
>> +
On 06/13/2017 02:47 PM, David Hildenbrand wrote:
+static inline bool psw_key_valid(CPUS390XState *env, uint8_t psw_key)
+{
+uint16_t pkm = ((env->cregs[3] & CR3_PKM) >> 16);
+
+if (env->psw.mask & PSW_MASK_PSTATE) {
+/* PSW key has range 0..15, it is valid if the bit is 1 in the P
This adds support for the MOVE WITH OPTIONAL SPECIFICATIONS (MVCOS)
instruction (in a relatively slow way). But it is enough to boot
a linux kernel that uses it for uacccess (primary <-> seconardy).
We are missing (as for most other part) low address protection checks,
PSW key / storage key checks
