Re: [Qemu-devel] [PATCH v1 2/2] RISC-V: Fix incorrect disassembly for addiw

2018-03-27 Thread Richard Henderson
On 03/28/2018 03:55 AM, Michael Clark wrote: > This fixes a bug in the disassembler constraints used > to lift instructions into pseudo-instructions, whereby > addiw instructions are always lifted to sext.w instead > of just lifting addiw with a zero immediate. > > An associated fix has been made

Re: [Qemu-devel] [PATCH v1 2/2] RISC-V: Fix incorrect disassembly for addiw

2018-03-27 Thread Philippe Mathieu-Daudé
On 03/27/2018 04:55 PM, Michael Clark wrote: > This fixes a bug in the disassembler constraints used > to lift instructions into pseudo-instructions, whereby > addiw instructions are always lifted to sext.w instead > of just lifting addiw with a zero immediate. > > An associated fix has been made

[Qemu-devel] [PATCH v1 2/2] RISC-V: Fix incorrect disassembly for addiw

2018-03-27 Thread Michael Clark
This fixes a bug in the disassembler constraints used to lift instructions into pseudo-instructions, whereby addiw instructions are always lifted to sext.w instead of just lifting addiw with a zero immediate. An associated fix has been made to the metadata used to machine generate the disseasemble