Re: [Qemu-devel] [PATCH target-arm v1 1/1] arm: translate.c: Fix smlald Instruction

2014-04-16 Thread Peter Crosthwaite
On Wed, Apr 16, 2014 at 1:27 AM, Peter Maydell wrote: > On 4 April 2014 03:19, Peter Crosthwaite wrote: >> The smlald (and probably smlsld) instruction was doing incorrect sign >> extensions of the operands amongst 64bit result calculation. The >> instruction psuedo-code is: >> >> operand2 = if

Re: [Qemu-devel] [PATCH target-arm v1 1/1] arm: translate.c: Fix smlald Instruction

2014-04-15 Thread Peter Maydell
On 4 April 2014 03:19, Peter Crosthwaite wrote: > The smlald (and probably smlsld) instruction was doing incorrect sign > extensions of the operands amongst 64bit result calculation. The > instruction psuedo-code is: > > operand2 = if m_swap then ROR(R[m],16) else R[m]; > product1 = SInt(R[n]<15

[Qemu-devel] [PATCH target-arm v1 1/1] arm: translate.c: Fix smlald Instruction

2014-04-03 Thread Peter Crosthwaite
The smlald (and probably smlsld) instruction was doing incorrect sign extensions of the operands amongst 64bit result calculation. The instruction psuedo-code is: operand2 = if m_swap then ROR(R[m],16) else R[m]; product1 = SInt(R[n]<15:0>) * SInt(operand2<15:0>); product2 = SInt(R[n]<31:16>) *