On Wed, 21 Nov 2018 18:23:26 PST (-0800), alistai...@gmail.com wrote:
On Wed, Nov 21, 2018 at 6:13 PM Palmer Dabbelt wrote:
On Wed, 21 Nov 2018 15:26:01 PST (-0800), log...@deltatee.com wrote:
>
>
> On 2018-11-21 4:10 p.m., Guenter Roeck wrote:
>> FWIW, I absoutely agree. If the board can only
On Wed, Nov 21, 2018 at 6:13 PM Palmer Dabbelt wrote:
>
> On Wed, 21 Nov 2018 15:26:01 PST (-0800), log...@deltatee.com wrote:
> >
> >
> > On 2018-11-21 4:10 p.m., Guenter Roeck wrote:
> >> FWIW, I absoutely agree. If the board can only be used to boot an initrd,
> >> it is quite pointless to have
On Wed, 21 Nov 2018 15:26:01 PST (-0800), log...@deltatee.com wrote:
On 2018-11-21 4:10 p.m., Guenter Roeck wrote:
FWIW, I absoutely agree. If the board can only be used to boot an initrd,
it is quite pointless to have it around. Actually it is worse than pointless,
since it will result in peo
On 2018-11-21 4:10 p.m., Guenter Roeck wrote:
> FWIW, I absoutely agree. If the board can only be used to boot an initrd,
> it is quite pointless to have it around. Actually it is worse than pointless,
> since it will result in people wasting their time trying to get it to work.
As someone who
On Wed, Nov 21, 2018 at 02:36:22PM -0800, Palmer Dabbelt wrote:
> On Wed, 21 Nov 2018 14:23:13 PST (-0800), alistai...@gmail.com wrote:
> >On Wed, Nov 21, 2018 at 2:15 PM Palmer Dabbelt wrote:
> >>
> >>On Wed, 21 Nov 2018 13:49:53 PST (-0800), alistai...@gmail.com wrote:
> >>> On Wed, Nov 21, 2018
On Wed, Nov 21, 2018 at 2:15 PM Palmer Dabbelt wrote:
>
> On Wed, 21 Nov 2018 13:49:53 PST (-0800), alistai...@gmail.com wrote:
> > On Wed, Nov 21, 2018 at 1:26 PM Palmer Dabbelt wrote:
> >>
> >> On Wed, 21 Nov 2018 10:32:45 PST (-0800), alistai...@gmail.com wrote:
> >> > On Wed, Nov 21, 2018 at
On Wed, 21 Nov 2018 14:23:13 PST (-0800), alistai...@gmail.com wrote:
On Wed, Nov 21, 2018 at 2:15 PM Palmer Dabbelt wrote:
On Wed, 21 Nov 2018 13:49:53 PST (-0800), alistai...@gmail.com wrote:
> On Wed, Nov 21, 2018 at 1:26 PM Palmer Dabbelt wrote:
>>
>> On Wed, 21 Nov 2018 10:32:45 PST (-08
On 2018-11-21 3:09 p.m., Alistair Francis wrote:
> Yeah, it's a real pain. I had a go at adding the SD card [1] but never
> got it fully working. Normally I just hack in the virtIO MMIO regions
> and use those.
>
> 1: https://github.com/alistair23/qemu/tree/mainline/alistair/sifive_spi.next
>
On Wed, 21 Nov 2018 14:01:34 PST (-0800), log...@deltatee.com wrote:
On 2018-11-21 2:54 p.m., Alistair Francis wrote:
The last time I tested this it worked (although I might not have
tested interrupts) and now it doesn't. Nothing has changed in the
series, my guest software has changed though.
On Wed, 21 Nov 2018 13:49:53 PST (-0800), alistai...@gmail.com wrote:
On Wed, Nov 21, 2018 at 1:26 PM Palmer Dabbelt wrote:
On Wed, 21 Nov 2018 10:32:45 PST (-0800), alistai...@gmail.com wrote:
> On Wed, Nov 21, 2018 at 10:05 AM Logan Gunthorpe wrote:
>>
>>
>>
>> On 2018-11-21 10:02 a.m., Ali
On Wed, 21 Nov 2018 14:01:10 PST (-0800), alistai...@gmail.com wrote:
On Wed, Nov 21, 2018 at 1:37 PM Palmer Dabbelt wrote:
On Wed, 21 Nov 2018 11:21:40 PST (-0800), alistai...@gmail.com wrote:
> On Wed, Nov 21, 2018 at 11:19 AM Logan Gunthorpe wrote:
>>
>>
>>
>> On 2018-11-21 12:16 p.m., Ali
On Wed, Nov 21, 2018 at 2:01 PM Logan Gunthorpe wrote:
>
>
>
> On 2018-11-21 2:54 p.m., Alistair Francis wrote:
> > The last time I tested this it worked (although I might not have
> > tested interrupts) and now it doesn't. Nothing has changed in the
> > series, my guest software has changed thoug
On 2018-11-21 2:54 p.m., Alistair Francis wrote:
> The last time I tested this it worked (although I might not have
> tested interrupts) and now it doesn't. Nothing has changed in the
> series, my guest software has changed though. I can see the root
> complex, but no devices underneath it.
>
>
On Wed, Nov 21, 2018 at 1:37 PM Palmer Dabbelt wrote:
>
> On Wed, 21 Nov 2018 11:21:40 PST (-0800), alistai...@gmail.com wrote:
> > On Wed, Nov 21, 2018 at 11:19 AM Logan Gunthorpe
> > wrote:
> >>
> >>
> >>
> >> On 2018-11-21 12:16 p.m., Alistair Francis wrote:
> >> >>> Do you see the MicroSemi
On Wed, Nov 21, 2018 at 11:51 AM Alistair Francis wrote:
>
> On Wed, Nov 21, 2018 at 11:25 AM Logan Gunthorpe wrote:
> >
> >
> >
> > On 2018-11-21 12:21 p.m., Alistair Francis wrote:
> > > On Wed, Nov 21, 2018 at 11:19 AM Logan Gunthorpe
> > > wrote:
> > >> Well, I also have a kernel (one I've
On Wed, Nov 21, 2018 at 1:26 PM Palmer Dabbelt wrote:
>
> On Wed, 21 Nov 2018 10:32:45 PST (-0800), alistai...@gmail.com wrote:
> > On Wed, Nov 21, 2018 at 10:05 AM Logan Gunthorpe
> > wrote:
> >>
> >>
> >>
> >> On 2018-11-21 10:02 a.m., Alistair Francis wrote:
> >> > Connect the Xilinx PCIe dev
On Wed, 21 Nov 2018 11:21:40 PST (-0800), alistai...@gmail.com wrote:
On Wed, Nov 21, 2018 at 11:19 AM Logan Gunthorpe wrote:
On 2018-11-21 12:16 p.m., Alistair Francis wrote:
>>> Do you see the MicroSemi PCIe probe in your dmesg?
>>
>> I do when I have a kernel with microsemi PCI Support (s
On Wed, 21 Nov 2018 10:32:45 PST (-0800), alistai...@gmail.com wrote:
On Wed, Nov 21, 2018 at 10:05 AM Logan Gunthorpe wrote:
On 2018-11-21 10:02 a.m., Alistair Francis wrote:
> Connect the Xilinx PCIe device based on the information in the device
> tree stored in the ROM of the HiFish Unlea
On Wed, Nov 21, 2018 at 11:25 AM Logan Gunthorpe wrote:
>
>
>
> On 2018-11-21 12:21 p.m., Alistair Francis wrote:
> > On Wed, Nov 21, 2018 at 11:19 AM Logan Gunthorpe
> > wrote:
> >> Well, I also have a kernel (one I've built myself) without microsemi
> >> support, but with Xilinx support and it
On 2018-11-21 12:21 p.m., Alistair Francis wrote:
> On Wed, Nov 21, 2018 at 11:19 AM Logan Gunthorpe wrote:
>> Well, I also have a kernel (one I've built myself) without microsemi
>> support, but with Xilinx support and it also doesn't work (see my dmesg
>> logs I sent).
>
> So this one should
On Wed, Nov 21, 2018 at 11:19 AM Logan Gunthorpe wrote:
>
>
>
> On 2018-11-21 12:16 p.m., Alistair Francis wrote:
> >>> Do you see the MicroSemi PCIe probe in your dmesg?
> >>
> >> I do when I have a kernel with microsemi PCI Support (specifically the
> >> one included in the bbl you sent us a whi
On 2018-11-21 12:18 p.m., Alistair Francis wrote:
>>>
>>> You should just be able to edit the source, grep for "microsemi".
>>
>> I don't see any "microsemi" in my riscv-pk source...
>
> msemi maybe?
>
> The compatible sting is: ms-pf,axi-pcie-host
None of the above.
Logan
On 2018-11-21 12:16 p.m., Alistair Francis wrote:
>>> Do you see the MicroSemi PCIe probe in your dmesg?
>>
>> I do when I have a kernel with microsemi PCI Support (specifically the
>> one included in the bbl you sent us a while back).
>
> Yeah, so you need to make sure that doesn't happen.
We
On Wed, Nov 21, 2018 at 11:15 AM Logan Gunthorpe wrote:
>
>
>
> On 2018-11-21 12:02 p.m., Alistair Francis wrote:
> > On Wed, Nov 21, 2018 at 10:50 AM Logan Gunthorpe
> > wrote:
> >>
> >>
> >>
> >> On 2018-11-21 11:32 a.m., Alistair Francis wrote:
> >>> That seems like either a kernel or bbl iss
On Wed, Nov 21, 2018 at 11:09 AM Logan Gunthorpe wrote:
>
>
>
> On 2018-11-21 12:02 p.m., Alistair Francis wrote:
> >> Ok, how do I stop bbl from editing the device tree? I have a kernel with
> >> Xilinx PCI support but it fails initializing on that machine (see below).
> >
> > You should just be
On 2018-11-21 12:02 p.m., Alistair Francis wrote:
> On Wed, Nov 21, 2018 at 10:50 AM Logan Gunthorpe wrote:
>>
>>
>>
>> On 2018-11-21 11:32 a.m., Alistair Francis wrote:
>>> That seems like either a kernel or bbl issue.
>>>
>>> You need to make sure that bbl doesn't edit the device tree (to add
On 2018-11-21 12:02 p.m., Alistair Francis wrote:
>> Ok, how do I stop bbl from editing the device tree? I have a kernel with
>> Xilinx PCI support but it fails initializing on that machine (see below).
>
> You should just be able to edit the source, grep for "microsemi".
Gross.
> Do you see
On Wed, Nov 21, 2018 at 10:50 AM Logan Gunthorpe wrote:
>
>
>
> On 2018-11-21 11:32 a.m., Alistair Francis wrote:
> > That seems like either a kernel or bbl issue.
> >
> > You need to make sure that bbl doesn't edit the device tree (to add
> > the Microsemi device or remove the Xilinx one) and ens
On 2018-11-21 11:36 a.m., Guenter Roeck wrote:
> What kernel configuration, devicetree, and qemu command line do you use
> for the sifive_u machine ?
For kernel configuration, I've tried a couple but I've attached one that
I think makes sense.
The device tree is whatever bbl/qemu are doing (sou
On 2018-11-21 11:32 a.m., Alistair Francis wrote:
> That seems like either a kernel or bbl issue.
>
> You need to make sure that bbl doesn't edit the device tree (to add
> the Microsemi device or remove the Xilinx one) and ensure your kernel
> supports the Xilinx one.
Ok, how do I stop bbl fro
Hi Logan,
On Wed, Nov 21, 2018 at 11:05:21AM -0700, Logan Gunthorpe wrote:
>
>
> On 2018-11-21 10:02 a.m., Alistair Francis wrote:
> > Connect the Xilinx PCIe device based on the information in the device
> > tree stored in the ROM of the HiFish Unleashed board.
>
> I only briefly tested this p
On Wed, Nov 21, 2018 at 10:05 AM Logan Gunthorpe wrote:
>
>
>
> On 2018-11-21 10:02 a.m., Alistair Francis wrote:
> > Connect the Xilinx PCIe device based on the information in the device
> > tree stored in the ROM of the HiFish Unleashed board.
>
> I only briefly tested this patch but could not g
On 2018-11-21 10:02 a.m., Alistair Francis wrote:
> Connect the Xilinx PCIe device based on the information in the device
> tree stored in the ROM of the HiFish Unleashed board.
I only briefly tested this patch but could not get any PCI devices to
come up with the sifive_u machine. Depending on
Connect the Xilinx PCIe device based on the information in the device
tree stored in the ROM of the HiFish Unleashed board.
Signed-off-by: Alistair Francis
---
hw/riscv/sifive_u.c | 64 +
include/hw/riscv/sifive_u.h | 4 ++-
2 files changed, 67 insert
34 matches
Mail list logo
